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Hi,
I have been pursuing the same or similar problems for a number of years
with programming HCS12Dx.

We have a few parallel Multilink P&E BDM interfaces and a USB Multilink.
We also have a Compod12. The Compod12 programs any HCS12 reliably but
the Multilink only programs HCS12E reliably and HCS12D's for a limited
period of time. After that the only the Compod12 will program HCS12D's
that can not be programmed with the Multilink. I find the USB Multilink
more reliable, and I use it with Cosmic Zap. The problem is that Zap
reports target speed can not be found, but P&E Unsecure connects fine
and of cause reports that the device is already unsecured.

Cosmic did suggest that I check the RAM base address setting in Zap but
it is fine.
I would appreciate your suggestions?
--
Andrew Lohmann AMIIE
Design Engineer

Bellingham + Stanley Ltd.
Longfield Road
Tunbridge Wells Kent,
TN2 3EY
United Kingdom

General Contact Details:
Phone: +44 (0) 1892 500400
Fax: +44 (0) 1892 543115

General E-Mail: s...@bellinghamandstanley.co.uk
Web: www.bellinghamandstanley.com

Personal Contact Details: Direct Dial: +44 (0) 1892 500426
-----------------------------Disclaimer-----------------------------

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Andrew,

I don't know much about Compod12, but I'm sure Multilink doesn't program
parts. Multilink is just an interface between PC and your target and I
believe that it doesn't know how to program all the variety of HC12s, S12s
and S08s. Debugger (ZAP in your case) must be what measures your oscilator
frequency and sets correctly the most important thing - FCLKDIV register. I
don't know how this scan for osc. freq. is really done and if it's reliable
or not. But bad things can happen to your chip if this scan for frequency is
not reliable. The question is what, Multilink or ZAP detects your board
frequency. Is it possible to disable scan for frequency and specify it in
ZAP? Maybe try NoICE +Multilink + S12D that doesn't work in ZAP?

No wonder Unsecure12 always works. Unsecure12 asks and doesn't guess
oscilator frequency.

Edward
Andrew Lohmann wrote:

> Hi,
> I have been pursuing the same or similar problems for a number of years
> with programming HCS12Dx.
>
> We have a few parallel Multilink P&E BDM interfaces and a USB Multilink.
> We also have a Compod12. The Compod12 programs any HCS12 reliably but
> the Multilink only programs HCS12E reliably and HCS12D's for a limited
> period of time. After that the only the Compod12 will program HCS12D's
> that can not be programmed with the Multilink. I find the USB Multilink
> more reliable, and I use it with Cosmic Zap. The problem is that Zap
> reports target speed can not be found, but P&E Unsecure connects fine
> and of cause reports that the device is already unsecured.
>
> Cosmic did suggest that I check the RAM base address setting in Zap but
> it is fine.
> I would appreciate your suggestions?
> --
> Andrew Lohmann AMIIE
> Design Engineer
>
> Bellingham + Stanley Ltd.
> Longfield Road
> Tunbridge Wells Kent,
> TN2 3EY
> United Kingdom
>
> General Contact Details:
> Phone: +44 (0) 1892 500400
> Fax: +44 (0) 1892 543115
>
> General E-Mail: s...@bellinghamandstanley.co.uk
> Web: www.bellinghamandstanley.com
>
> Personal Contact Details: Direct Dial: +44 (0) 1892 500426
> -----------------------------Disclaimer-----------------------------
>
> This communication contains information which is confidential and may also
> be privileged. It is for the exclusive use of the addressee. If you are
> not the addressee please note that any distribution, reproduction,
> copying, publication or use of this communication or the information is
> prohibited. If you have received this communication in error, please
> contact us immediately and also delete the communication from your
> computer. We accept no liability for any loss or damage suffered by any
> person arising from use of this e-mail.
>
> Bellingham + Stanley Ltd., Longfield Road, Tunbridge Wells, Kent, TN2 3EY.
> U.K. Registered No. 140250 England. Registered Office.
>
> This message has been scanned for viruses by Viatel MailControl, a service
> from Viatel.
>
> -----------------------------Disclaimer-----------------------------
>
> Yahoo! Groups Links
>


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Thanks Edward,
I can fix the two clock frequency's, and that is how I run Zap.
Strangely also using ComPod12 on a HCS12D target also makes it unusable
by Zap although P&E's unsecure is fine.
Maybe I should try NoICE.
Andrew Lohmann AMIIE
Design Engineer

Bellingham + Stanley Ltd.
Edward Karpicz wrote:
>
> Andrew,
>
> I don't know much about Compod12, but I'm sure Multilink doesn't program
> parts. Multilink is just an interface between PC and your target and I
> believe that it doesn't know how to program all the variety of HC12s,
> S12s
> and S08s. Debugger (ZAP in your case) must be what measures your
> oscilator
> frequency and sets correctly the most important thing - FCLKDIV
> register. I
> don't know how this scan for osc. freq. is really done and if it's
> reliable
> or not. But bad things can happen to your chip if this scan for
> frequency is
> not reliable. The question is what, Multilink or ZAP detects your board
> frequency. Is it possible to disable scan for frequency and specify it in
> ZAP? Maybe try NoICE +Multilink + S12D that doesn't work in ZAP?
>
> No wonder Unsecure12 always works. Unsecure12 asks and doesn't guess
> oscilator frequency.
>
> Edward
>
> Andrew Lohmann wrote:
>
> > Hi,
> >
> >
> > I have been pursuing the same or similar problems for a number of years
> > with programming HCS12Dx.
> >
> > We have a few parallel Multilink P&E BDM interfaces and a USB Multilink.
> > We also have a Compod12. The Compod12 programs any HCS12 reliably but
> > the Multilink only programs HCS12E reliably and HCS12D's for a limited
> > period of time. After that the only the Compod12 will program HCS12D's
> > that can not be programmed with the Multilink. I find the USB Multilink
> > more reliable, and I use it with Cosmic Zap. The problem is that Zap
> > reports target speed can not be found, but P&E Unsecure connects fine
> > and of cause reports that the device is already unsecured.
> >
> > Cosmic did suggest that I check the RAM base address setting in Zap but
> > it is fine.
> >
> >
> > I would appreciate your suggestions?
> > --
> > Andrew Lohmann AMIIE
> > Design Engineer
> >
> > Bellingham + Stanley Ltd.
> > Longfield Road
> > Tunbridge Wells Kent,
> > TN2 3EY
> > United Kingdom
> >
> > General Contact Details:
> > Phone: +44 (0) 1892 500400
> > Fax: +44 (0) 1892 543115
> >
> > General E-Mail: s...@bellinghamandstanley.co.uk
>
> > Web: www.bellinghamandstanley.com
> >
> > Personal Contact Details: Direct Dial: +44 (0) 1892 500426
> >
> >
> > -----------------------------Disclaimer-----------------------------
> >
> > This communication contains information which is confidential and
> may also
> > be privileged. It is for the exclusive use of the addressee. If you are
> > not the addressee please note that any distribution, reproduction,
> > copying, publication or use of this communication or the information is
> > prohibited. If you have received this communication in error, please
> > contact us immediately and also delete the communication from your
> > computer. We accept no liability for any loss or damage suffered by any
> > person arising from use of this e-mail.
> >
> > Bellingham + Stanley Ltd., Longfield Road, Tunbridge Wells, Kent,
> TN2 3EY.
> > U.K. Registered No. 140250 England. Registered Office.
> >
> > This message has been scanned for viruses by Viatel MailControl, a
> service
> > from Viatel.
> >
> > -----------------------------Disclaimer-----------------------------
> >
> >
> >
> > Yahoo! Groups Links
> >
> >
> >



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Hello !

Until now, I was using mc9s12dp256 with ICC12 V6 professionnal, paged
programm, and all was ok.

Now, using mc9s12xdp512cal, with ICC12 professionnal V6, I need to use XGate
processor (communication SCI between 2 MCU). Without XGate, the main S12 CPU
would be overload !

I read the Freescale datasheets, specially the chapters about :
- XGate,
- Memory Mapping Control
- Interrupt
- and some Application Notes about XGate

It seems to be difficult to know how to program that XGate processor. I
looked for some samples without any success !
The samples I can analyse (Cosmic and CodeWarrior) give a little bit of
informations (just one sample program), but are not very clear at all,
specially memory access, memory mapping...

If I understood, for XGate point of view :
- 2K registers are under address 0x0000..0x07ff
- 30k flash for XGate from xgate address 0x0800..0x7fff
- 32K RAM of the XDP512 are under address 0x8000..0xffff,

I understand all the RAM available on XDP512 can be access with XGate, and
the pagination system (RPAGE) to access RAM under S12 CPU.

I don't completely understand the memory scheme of XDP512.
I know there are 512K flash, but I don't see anything about the different
pages. DP256 had internal pages from 0x30..0x3f, with window 0x8000..0xc000,
but XDP512 ? It seems to be pages 0xe0..0xfd, same window ? Correct ?

Any help ?
All samples about XGate wil be welcome !

With all my thanks
Best regards

Joel Petrique



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Hello,

I'm trying to do some thread for XGate.

The first thread I wrote, using RTI, is now OK, so I can see it running
under simulator AND on my target processor.

The second, using SCI1,

- runs under simulator : I can see interrupt, immediately when I put a
character in SCI1DRL then generate xmit interrupt, and XGate thread executed

- but not on the target : thread never executed

Before trying with XGate, I used S12 interrupts, and my soft was OK.

Now, because of these difficulties to startup XGate, I dramatically simplify
the program :

Into main function :

void main (void)

{ unsigned char c;

// some initialisations, used in an other program

c = 'A';

for (;;)

{ SCI1DRL = c; // send char

SCI1CR2 |= 0x88; // enable SCI xmit and interrupts

c++;

}

}

Now, the thread SCI1, with the pointer to the original datas (not use now)

interrupt void XGATE_SCI1_thread (TSci1Datas *ptr)

{ unsigned char status, tempo;

status = SCI1SR1; // read SCI1 status

tempo = SCI1BDL; // dummy read (usefull ?)

if (status & 0x80) // if xmit buffer empty

{ SCI1CR2 &= 0x3f; // inhibe xmit interrupts

}

}

Anybody can help me ?

Thanks !

Best regards.

Joel

[Non-text portions of this message have been removed]



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