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Hello, I am asking you for help with a migration problem, migrating
code from IAREW 2.31 C to 4.7.

The memory won't map in the same areas as in the older versions. In
the old version, #pragma codeseg(XXX) was used, looking in the IAR
migration guide, this translates to #pragma location = "XXX". The same
with #pragma memory=constseg(YYY) will be #pragma constseg = "YYY".
However, the linker does not map it in 0x8000 as it used to in the old
version, it puts all in 0x4000.

The .xcl files I've tried to upgrade as good as I could, with the same
areas of segments:

Old:

//-Z(CODE)CDATA0,CDATA1,CCSTR=C000-FF7F
//-P(CODE)RCODE,CODE,CONST,CSTR,CHECKSUM=C000-FF7F
-Z(CODE)CDATA0,CDATA1,CCSTR=0800-08FF
-P(CODE)RCODE,CODE,CONST,CSTR,CHECKSUM=0800-0897
-P(CODE)EEPROMVER=0898-089F
-P(CODE)EEPROMIRQ=08A0-08AF
-P(CODE)EEPROMAPI=08B0-08B7
-P(CODE)EEPROM=08C0-0FFF
-P(CODE)BYTE=8000-800F
-P(CODE)FLASHAPI=8010-801F
-P(CODE)FLASHIRQ=8020-80FF
-P(CODE)FLASH=8100-BFFF
-P(CODE)MIFDEBUG=4000-4FFF

-Z(CODE)INTVEC=FF80-FFFF

-Z(DATA)CSTACK+100,DATA1,IDATA1,UDATA1,ECSTR,WCSTR,TEMP=2880-3FFF
-Z(DATA)EEPROMVARS=2000-287F

//** -Z(DATA)DATA0,IDATA0,UDATA0=00-FF **

-Z(DATA)DATA0,IDATA0,UDATA0=FFFFFFFF-FFFFFFFF

New:

//-Z(CODE)CDATA0,CDATA1,CCSTR=C000-FF7F
//-P(CODE)RCODE,CODE,CONST,CSTR,CHECKSUM=C000-FF7F
//-Z(CODE)CDATA0,CDATA1,CCSTR=0800-08FF
//-P(CODE)RCODE,CODE,CONST,CSTR,CHECKSUM=0800-0897
-P(CODE)EEPROMVER=0898-089F
-P(CODE)EEPROMIRQ=08A0-08AF
-P(CODE)EEPROMAPI=08B0-08B7
-P(CODE)EEPROM=08C0-0FFF
-P(CODE)BYTE=8000-800F
-P(CODE)FLASHAPI=8010-801F
-P(CODE)FLASHIRQ=8020-80FF
-P(CODE)FLASH=8100-BFFF
-P(CODE)MIFDEBUG=4000-4FFF

//-Z(DATA)DATA8_I,DATA8_Z,DATA8_N=00-FF

// DATA8_C can be used if you map a ROM of some kind to the 00-FF
// address range.
// -Z(DATA)DATA8_C

//-Z(CODE)DATA8_ID,DATA16_ID,INITTAB=_EEPROM_BEGIN-_EEPROM_END //
Place code in EEPROM

-Z(CODE)DATA8_ID,DATA16_ID,INITTAB=_FLASH16MID_BEGIN-_FLASH16MID_END,_FLASH16HI_BEGIN-_FLASH16HI_END
-Z(CODE)DIFUNCT
-P(CODE)DATA16_C,CODE,CHECKSUM

//-D_PAGES=8

//-P(CODE)BANKED_CODE,BANKED_CODE_SEGMENT_INIT=[_FLASH16PAGE_BEGIN-_FLASH16PAGE_END]*_PAGES+10000
// Place banked code into logical pages

-Z(DATA)DATA16_I,DATA16_Z,DATA16_N,HEAP+_HEAP_SIZE=2880-3FFF
//_RAM_BEGIN-_RAM_END
-Z(CODE)DBG_CODE
-Z(DATA)CSTACK+_STACK_SIZE#
-Z(DATA)EEPROMVARS=2000-287F

Thanks for your help

Rickard, Gothenburg, Sweden

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I'm using the 68HC912DT128A CPU...
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