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Discussion Groups | 68HC12 | Problem of reset with 9S12DG256

Join our technical discussions about Freescale Microcontrollers: M68HC12. (Freescale Semiconductor is a Subsidiary of Motorola).

Problem of reset with 9S12DG256 - Florent VERRIERE - Feb 27 12:11:00 2003

Hi all,

Sometimes , when I power on my board , the microprocessor doesn't start running and gives a low voltage on reset/ pin.
Reset/ seems correct in duration (100ms) and level when microprocessor is running well.
Reset/ stays at Level '0' ( 0,2 V) when microprocessor forces to this level.
The oscillator is a 50 mhz.
What can be cause of this problem?
Thank you,
Florent VERRIERE.

Micro Plus

[Non-text portions of this message have been removed]


______________________________
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Re: Problem of reset with 9S12DG256 - Guillermo F. Molina - Feb 27 19:10:00 2003

Hi Florent,
I'm not sure that the external clock is related to your reset problem, but
if you read the DG256 datasheet you will find that you need very stringent
specs to use an external clock at 50 Mhz.
9.5 ns minumun High & Low times and 1 ns max rise & fall times gives you no
margin for a 20 ns clock period .
Also remember that the external clock amplitude is 2.5 volt.
I recomend you to use the internal PLL to multiply either a slower external
clock or the internal xtal oscillator (fmax=16 Mhz for xtal).
I use a canned 16 Mhz oscillator and the PLL to bring it up to 48 Mhz (24
Mhz Bus Clock)
Regards,
Guillermo Molina.

----- Original Message -----
From: "Florent VERRIERE" <>
To: <>
Sent: Thursday, February 27, 2003 2:11 PM
Subject: [68HC12] Problem of reset with 9S12DG256 > Hi all,
>
> Sometimes , when I power on my board , the microprocessor doesn't start
running and gives a low voltage on reset/ pin.
> Reset/ seems correct in duration (100ms) and level when microprocessor is
running well.
> Reset/ stays at Level '0' ( 0,2 V) when microprocessor forces to this
level.
> The oscillator is a 50 mhz.
> What can be cause of this problem?
> Thank you,
> Florent VERRIERE.
>
> Micro Plus >
>
> [Non-text portions of this message have been removed] >
> --------------------------------------------------------
> To unsubscribe from this group, send an email to: > To learn more about Motorola Microcontrollers, please visit
> http://www.motorola.com/mcu



______________________________
Stellaris® MCU Family: New Parts, New Package, New Price.


(You need to be a member of 68hc12 -- send a blank email to 68hc12-subscribe@yahoogroups.com )

Re: Problem of reset with 9S12DG256 - Florent VERRIERE - Feb 28 10:23:00 2003

Thanks Guillermo for your answer,

I'm agree with you on explanation about my problem.
We have use a 50 mhz oscillator to reduce delay on our project but we want
to use a quartz and PLL in the future. With our problem that occur during
reset, we have to develop this now.
Is it easy to program PLL multiplier.
Best Regards,
Florent VERRIERE.

----- Original Message -----
From: "Guillermo F. Molina" <>
To: <>
Sent: Friday, February 28, 2003 1:10 AM
Subject: Re: [68HC12] Problem of reset with 9S12DG256 > Hi Florent,
> I'm not sure that the external clock is related to your reset problem, but
> if you read the DG256 datasheet you will find that you need very
stringent
> specs to use an external clock at 50 Mhz.
> 9.5 ns minumun High & Low times and 1 ns max rise & fall times gives you
no
> margin for a 20 ns clock period .
> Also remember that the external clock amplitude is 2.5 volt.
> I recomend you to use the internal PLL to multiply either a slower
external
> clock or the internal xtal oscillator (fmax=16 Mhz for xtal).
> I use a canned 16 Mhz oscillator and the PLL to bring it up to 48 Mhz (24
> Mhz Bus Clock)
> Regards,
> Guillermo Molina.
>
> ----- Original Message -----
> From: "Florent VERRIERE" <>
> To: <>
> Sent: Thursday, February 27, 2003 2:11 PM
> Subject: [68HC12] Problem of reset with 9S12DG256 > > Hi all,
> >
> > Sometimes , when I power on my board , the microprocessor doesn't start
> running and gives a low voltage on reset/ pin.
> > Reset/ seems correct in duration (100ms) and level when microprocessor
is
> running well.
> > Reset/ stays at Level '0' ( 0,2 V) when microprocessor forces to this
> level.
> > The oscillator is a 50 mhz.
> > What can be cause of this problem?
> > Thank you,
> > Florent VERRIERE.
> >
> > Micro Plus
> >
> >
> >
> >
> > [Non-text portions of this message have been removed]
> >
> >
> >
> > --------------------------------------------------------
> > To unsubscribe from this group, send an email to:
> >
> >
> > To learn more about Motorola Microcontrollers, please visit
> > http://www.motorola.com/mcu
> >
> >
> >
> >
> >
> --------------------------------------------------------
> To unsubscribe from this group, send an email to: > To learn more about Motorola Microcontrollers, please visit
> http://www.motorola.com/mcu




(You need to be a member of 68hc12 -- send a blank email to 68hc12-subscribe@yahoogroups.com )

Re: Problem of reset with 9S12DG256 - Steve Russell - Feb 28 17:46:00 2003

About the PLL:

It's easy to program, but there are a some obscure points:

PLL Filter
----------

You MUST put 2 capacitors and a resistor on the XFC pin. Motorola has a PC
program that gives component values and a schematic.

You should be careful to get the latest version.

If you want to run the PLL at different frequencies, you will have to try
lots of different settings in the Motorola PLL calculator to get compromise
values.

Note this calculator puts out decimal values. Turning on the PLL versus Selecting the PLL for System Clock
------------------------------------------------------------

If you select the PLL when it is not locked, you may get extremely
"undefined" system behavior.

If you follow this sequence, you won't get in trouble:

Load SYNR and REFDV.

Turn the PLL on. ( PLLON in PLLCTL )

Wait for the PLL to lock. (See below.)

Select the PLL for system clocks, ( PLLSEL in CLKSEL ) Lock Detection
--------------

We have occasionally seen problems that looked like the reporting of PLL
lock was very occasionally incorrect.

In our emulators we check the lock bit ( LOCK in CRGFLG ) repeatedly for
about 10 periods of the phase detector. ( External clock period * REFDV
setting ).

Only if the LOCK bit stays set for 10 phase detector periods do we consider
the PLL locked and switch the system clocks to the PLL.

Since we made this change we have seen no problems, but we never proved the
original problem was the LOCK bit.

An alternative method is to wait "long enough". Some people just wait for
a second after turning on the PLL before switching system clock to the PLL,
and have reported no problems with this approach.

Since the lock time of a PLL is quite variable, "long enough" is probably
at least 10 times the "lock time" given by the PLL calculator, and could be
in the range of 100 times the "lock time". Notes
-----

If you have any time-consuming operations to do on start-up, such as check
summing flash, you could do them between turning on the PLL and selecting it.

When the COP watchdog reset occurs, the system gets reset to the external
oscillator, and your software needs to select the PLL and do all the other
tasks that you do on initial reset.

Steve At 07:23 AM 2/28/2003, you wrote:
>Thanks Guillermo for your answer,
>
>I'm agree with you on explanation about my problem.
>We have use a 50 mhz oscillator to reduce delay on our project but we want
>to use a quartz and PLL in the future. With our problem that occur during
>reset, we have to develop this now.
>Is it easy to program PLL multiplier.
>Best Regards,
>Florent VERRIERE.
>
>----- Original Message -----
>From: "Guillermo F. Molina" <>
>To: <>
>Sent: Friday, February 28, 2003 1:10 AM
>Subject: Re: [68HC12] Problem of reset with 9S12DG256 > > Hi Florent,
> > I'm not sure that the external clock is related to your reset problem, but
> > if you read the DG256 datasheet you will find that you need very
>stringent
> > specs to use an external clock at 50 Mhz.
> > 9.5 ns minumun High & Low times and 1 ns max rise & fall times gives you
>no
> > margin for a 20 ns clock period .
> > Also remember that the external clock amplitude is 2.5 volt.
> > I recomend you to use the internal PLL to multiply either a slower
>external
> > clock or the internal xtal oscillator (fmax=16 Mhz for xtal).
> > I use a canned 16 Mhz oscillator and the PLL to bring it up to 48 Mhz (24
> > Mhz Bus Clock)
> > Regards,
> > Guillermo Molina.
> >
> > ----- Original Message -----
> > From: "Florent VERRIERE" <>
> > To: <>
> > Sent: Thursday, February 27, 2003 2:11 PM
> > Subject: [68HC12] Problem of reset with 9S12DG256
> >
> >
> > > Hi all,
> > >
> > > Sometimes , when I power on my board , the microprocessor doesn't start
> > running and gives a low voltage on reset/ pin.
> > > Reset/ seems correct in duration (100ms) and level when microprocessor
>is
> > running well.
> > > Reset/ stays at Level '0' ( 0,2 V) when microprocessor forces to this
> > level.
> > > The oscillator is a 50 mhz.
> > > What can be cause of this problem?
> > > Thank you,
> > > Florent VERRIERE.
> > >
> > > Micro Plus
> > >
> > >
> > >
> > >
> > > [Non-text portions of this message have been removed]
> > >
> > >
> > >
> > > --------------------------------------------------------
> > > To unsubscribe from this group, send an email to:
> > >
> > >
> > > To learn more about Motorola Microcontrollers, please visit
> > > <http://www.motorola.com/mcu>http://www.motorola.com/mcu
> > >
> > >
> > > >http://docs.yahoo.com/info/terms/
> > >
> > >
> >
> >
> >
> > --------------------------------------------------------
> > To unsubscribe from this group, send an email to:
> >
> >
> > To learn more about Motorola Microcontrollers, please visit
> > <http://www.motorola.com/mcu>http://www.motorola.com/mcu
> >
> >
> > >http://docs.yahoo.com/info/terms/
> >
> >
> >Yahoo! Groups Sponsor
>ADVERTISEMENT
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[Non-text portions of this message have been removed]

______________________________
Stellaris® MCU Family: New Parts, New Package, New Price.


(You need to be a member of 68hc12 -- send a blank email to 68hc12-subscribe@yahoogroups.com )