Re: Memory Expansion 'a4 Chip | 68HC12

Several students and I are working on interfacing 2 - 2048 by 8 RAM chips onto a 68HC12 'A4 chip. The development board in use is the EVMicro-HC12 (www.advancedmsinc.com) Any suggestions on how to approach this project would be appreciated. Thanks! JDF

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Johnny, Interfacing a couple of RAM chips to the 812A4 is pretty straightforward. Use the built-in chip select logic if at all possible. The documentation for the chip selects can be hard to understand at first, but this feature makes life much easier in the end. The RAM will want Intel-style output enable and write enable (/OE and /WE) signals, but the 812A4 generates Motorola-style R/W and ECLK signals. I like to use the traditional three NAND gate circuit to generate /OE and /WE: /OE = (R/W NAND ECLK) /WE = (R/W NAND (NOT ECLK)) [Generate NOT ECLK as ECLK NAND ECLK] It is only fair to note, however, that some list members disagree with this. They connect R/W directly to /WE. I don't recall how they generate /OE. If you are using a wide bus, note that A0 acts as the upper byte strobe signal, the counterpart to the /LSTRB signal for the lower byte. That means that the A0-A(n) pins on the RAM are wired to A1-A(n+1) on the HC12. Watch out for level translation. Most 5 volt RAM chips use TTL levels, while the 812A4 requires CMOS levels. A number of people on the list have reported problems directly connecting TTL-level RAMs to the HC12. Pull-up resistors on the data bus are a simple and cheap solution. You could also use buffer chips to translate the data bus levels. Please feel free to give me a holler if you have any specific questions. I'm also sure you will find plenty of people on the list willing to help. Stephen -- Stephen Trier Technical Development Lab Cleveland FES Center / CWRU / KG8IH

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Discussion Groups | 68HC12 | Re: Memory Expansion 'a4 Chip

Memory Expansion 'a4 Chip - Johnny - Sep 20 16:00:00 2003

Re: Memory Expansion 'a4 Chip - Stephen Trier - Sep 22 13:47:00 2003