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Discussion Groups | AT91SAM ARM | Generating FIQ interrupt in AT91SAM9RL64
For users of the Atmel AT91SAM7 and AT91SAM9 ARM CPU chips. Atmel has taken a new direction by combining on chip flash and ram with the ARM CPU on a single die. This provides low cost devices for small systems using the ARM CPU. This group is to exchange information to help users get started and learn how to use the devices.
Generating FIQ interrupt in AT91SAM9RL64 - "ICLI, Bekir (EXT)" - Mar 3 7:00:58 2008
Hi all,
I wanna test my FIQ handler but couldn't manage to generate an FIQ
interrupt.
I tried AT91C_BASE_AIC->AIC_ISCR = AT91C_ID_FIQ which requires the
fiq interrupt to be setup as edge sensitive.
And I made sure to do that. I changed my operating mode to supervisor
mode with I and F bits unset, which means they are enabled as well.
Right now all I need is to fire this interrupt which I am unable to do.
Any help would be appreciated..
Regards,
Bekir
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
I wanna test my FIQ handler but couldn't manage to generate an FIQ
interrupt.
I tried AT91C_BASE_AIC->AIC_ISCR = AT91C_ID_FIQ which requires the
fiq interrupt to be setup as edge sensitive.
And I made sure to do that. I changed my operating mode to supervisor
mode with I and F bits unset, which means they are enabled as well.
Right now all I need is to fire this interrupt which I am unable to do.
Any help would be appreciated..
Regards,
Bekir
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )