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Discussion Groups | AT91SAM ARM | Reset behaviour in AT91SAM9RL64
For users of the Atmel AT91SAM7 and AT91SAM9 ARM CPU chips. Atmel has taken a new direction by combining on chip flash and ram with the ARM CPU on a single die. This provides low cost devices for small systems using the ARM CPU. This group is to exchange information to help users get started and learn how to use the devices.
Reset behaviour in AT91SAM9RL64 - "ICLI, Bekir (EXT)" - Mar 12 6:05:23 2008
Hi all,
I am trying to find out the reason why my code gives an SWI exception.
What I do is, load my code to sdram, and at some point set the PROCRST
and EXTRST bits of Reset Controller Control Register.
And it gives immediately SWI exception.
A part in the book says for SWI that "lr points to the next instruction
after the SWI instruction." But in my case, that is 0x1FFB7BCC which
makes no sense.
However, when I load my code to sram, and go thru the same procedure,
there is no problem, and reset runs with no problem.
In the manual, I could not find much that explains the behaviour of the
processor when these bits are set.
Does anybody have an idea?
Thanks in advance,
Bekir ICLI
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
I am trying to find out the reason why my code gives an SWI exception.
What I do is, load my code to sdram, and at some point set the PROCRST
and EXTRST bits of Reset Controller Control Register.
And it gives immediately SWI exception.
A part in the book says for SWI that "lr points to the next instruction
after the SWI instruction." But in my case, that is 0x1FFB7BCC which
makes no sense.
However, when I load my code to sram, and go thru the same procedure,
there is no problem, and reset runs with no problem.
In the manual, I could not find much that explains the behaviour of the
processor when these bits are set.
Does anybody have an idea?
Thanks in advance,
Bekir ICLI
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
Re: Reset behaviour in AT91SAM9RL64 - willoughby_jon - Mar 13 21:38:11 2008
BKPT, Undefined instruction, and Software Interrupt (SWI)
Are the EBI registers still configured correctly for SDRAM after you
set PROCRST and EXTRST and trap BKPT? Perhaps the instruction fetch
failed?
Jon
--- In A...@yahoogroups.com, "ICLI, Bekir (EXT)"
wrote:
>
> Hi all,
>
> I am trying to find out the reason why my code gives an SWI
exception.
> What I do is, load my code to sdram, and at some point set the
PROCRST
> and EXTRST bits of Reset Controller Control Register.
> And it gives immediately SWI exception.
> A part in the book says for SWI that "lr points to the next
instruction
> after the SWI instruction." But in my case, that is 0x1FFB7BCC which
> makes no sense.
>
> However, when I load my code to sram, and go thru the same
procedure,
> there is no problem, and reset runs with no problem.
> In the manual, I could not find much that explains the behaviour of
the
> processor when these bits are set.
>
> Does anybody have an idea?
> Thanks in advance,
>
> Bekir ICLI
>
------------------------------------
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
Are the EBI registers still configured correctly for SDRAM after you
set PROCRST and EXTRST and trap BKPT? Perhaps the instruction fetch
failed?
Jon
--- In A...@yahoogroups.com, "ICLI, Bekir (EXT)"
>
> Hi all,
>
> I am trying to find out the reason why my code gives an SWI
exception.
> What I do is, load my code to sdram, and at some point set the
PROCRST
> and EXTRST bits of Reset Controller Control Register.
> And it gives immediately SWI exception.
> A part in the book says for SWI that "lr points to the next
instruction
> after the SWI instruction." But in my case, that is 0x1FFB7BCC which
> makes no sense.
>
> However, when I load my code to sram, and go thru the same
procedure,
> there is no problem, and reset runs with no problem.
> In the manual, I could not find much that explains the behaviour of
the
> processor when these bits are set.
>
> Does anybody have an idea?
> Thanks in advance,
>
> Bekir ICLI
>
------------------------------------
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )