Sign in
Search AT91SAM
Subscribe to AT91SAM
Ads
Discussion Groups
Discussion Groups | AT91SAM ARM | AT91SAM9260 programm Nor Flash at NCS0
For users of the Atmel AT91SAM7 and AT91SAM9 ARM CPU chips. Atmel has taken a new direction by combining on chip flash and ram with the ARM CPU on a single die. This provides low cost devices for small systems using the ARM CPU. This group is to exchange information to help users get started and learn how to use the devices.
AT91SAM9260 programm Nor Flash at NCS0 - Bernd - Jul 13 18:24:10 2008
Hi,
I`m working with the AT91SAM9260 controller and I try to download some
code by the jtag interface to the external NOR flash (connected at
NCS0). When I power up the board the controller tries to read out a
valid sequence from the nor flash (NCS0 is low, NWE0 is high and NRD is
low (similar to a clock signal)). Therefore I think the bootloader /
controller is working there should be no hardware problem with the
connection between the nor flash and the controller.
But when I try to download some code from the jtag interface to the
flash, I`m not able to generate a low signal at NCS0. Do I have to
configurate the SMC controller????
The flash that I used is AT49BV160 (with the same connections as in the
datasheet from the controller (page 159).
At the moment I configurate all clocks and the mode register from the
SMC controller.
// CKGR_MOR: Enable main oscillator
_WDWORD(PMC+ 0x20, 0x0000FF01);
_sleep_(100); // Wait for stable Main Oscillator
// CKGR_PLLAR: Configure PLL A
_WDWORD(PMC+ 0x28, 0x20483F0E);
_sleep_(100); // Wait for stable PLL A
// PMC_MCKR: MDIV and PRES fields
_WDWORD(PMC+ 0x30, 0x00000000);
_sleep_(100); // Wait for Main Master Clock ready
// PMC_MCKR: all fields
_WDWORD(PMC+ 0x30, 0x00000002);
_sleep_(100);
_WDWORD(0xFFFFEC0C,0x00021103); //control by nwe and nrd
I`m working with the keil uvision, where I try to use the flash
algorithm (for programming, erasing etc.) for the AT49xV16x4A (where
the size is 2M and 16Bit).
I hope someone of you could give me some advice to programm the flash.
best regards
Bernd
------------------------------------
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
I`m working with the AT91SAM9260 controller and I try to download some
code by the jtag interface to the external NOR flash (connected at
NCS0). When I power up the board the controller tries to read out a
valid sequence from the nor flash (NCS0 is low, NWE0 is high and NRD is
low (similar to a clock signal)). Therefore I think the bootloader /
controller is working there should be no hardware problem with the
connection between the nor flash and the controller.
But when I try to download some code from the jtag interface to the
flash, I`m not able to generate a low signal at NCS0. Do I have to
configurate the SMC controller????
The flash that I used is AT49BV160 (with the same connections as in the
datasheet from the controller (page 159).
At the moment I configurate all clocks and the mode register from the
SMC controller.
// CKGR_MOR: Enable main oscillator
_WDWORD(PMC+ 0x20, 0x0000FF01);
_sleep_(100); // Wait for stable Main Oscillator
// CKGR_PLLAR: Configure PLL A
_WDWORD(PMC+ 0x28, 0x20483F0E);
_sleep_(100); // Wait for stable PLL A
// PMC_MCKR: MDIV and PRES fields
_WDWORD(PMC+ 0x30, 0x00000000);
_sleep_(100); // Wait for Main Master Clock ready
// PMC_MCKR: all fields
_WDWORD(PMC+ 0x30, 0x00000002);
_sleep_(100);
_WDWORD(0xFFFFEC0C,0x00021103); //control by nwe and nrd
I`m working with the keil uvision, where I try to use the flash
algorithm (for programming, erasing etc.) for the AT49xV16x4A (where
the size is 2M and 16Bit).
I hope someone of you could give me some advice to programm the flash.
best regards
Bernd
------------------------------------
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
Re: AT91SAM9260 programm Nor Flash at NCS0 - bernd schuster - Jul 23 5:09:55 2008
at the moment I`m able to see an activitiy at NCS0 and NRD pin when I try to
erase / sector erase the chip. But there`s no activity at NWE - what could
be the reason for this behaviour?
I have select the peripheral A, disable PIO controlller and the internal
pullups. If I don`t do this steps then I won`t see any activity at NRD too.
best rgds
Bernd
2008/7/12 Bernd:
> Hi,
>
> I`m working with the AT91SAM9260 controller and I try to download some
> code by the jtag interface to the external NOR flash (connected at
> NCS0). When I power up the board the controller tries to read out a
> valid sequence from the nor flash (NCS0 is low, NWE0 is high and NRD is
> low (similar to a clock signal)). Therefore I think the bootloader /
> controller is working there should be no hardware problem with the
> connection between the nor flash and the controller.
>
> But when I try to download some code from the jtag interface to the
> flash, I`m not able to generate a low signal at NCS0. Do I have to
> configurate the SMC controller????
>
> The flash that I used is AT49BV160 (with the same connections as in the
> datasheet from the controller (page 159).
>
> At the moment I configurate all clocks and the mode register from the
> SMC controller.
>
> // CKGR_MOR: Enable main oscillator
> _WDWORD(PMC+ 0x20, 0x0000FF01);
> _sleep_(100); // Wait for stable Main Oscillator
>
> // CKGR_PLLAR: Configure PLL A
> _WDWORD(PMC+ 0x28, 0x20483F0E);
> _sleep_(100); // Wait for stable PLL A
>
> // PMC_MCKR: MDIV and PRES fields
> _WDWORD(PMC+ 0x30, 0x00000000);
> _sleep_(100); // Wait for Main Master Clock ready
>
> // PMC_MCKR: all fields
> _WDWORD(PMC+ 0x30, 0x00000002);
> _sleep_(100);
>
> _WDWORD(0xFFFFEC0C,0x00021103); //control by nwe and nrd
>
> I`m working with the keil uvision, where I try to use the flash
> algorithm (for programming, erasing etc.) for the AT49xV16x4A (where
> the size is 2M and 16Bit).
>
> I hope someone of you could give me some advice to programm the flash.
>
> best regards
> Bernd
>
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )
erase / sector erase the chip. But there`s no activity at NWE - what could
be the reason for this behaviour?
I have select the peripheral A, disable PIO controlller and the internal
pullups. If I don`t do this steps then I won`t see any activity at NRD too.
best rgds
Bernd
2008/7/12 Bernd
> Hi,
>
> I`m working with the AT91SAM9260 controller and I try to download some
> code by the jtag interface to the external NOR flash (connected at
> NCS0). When I power up the board the controller tries to read out a
> valid sequence from the nor flash (NCS0 is low, NWE0 is high and NRD is
> low (similar to a clock signal)). Therefore I think the bootloader /
> controller is working there should be no hardware problem with the
> connection between the nor flash and the controller.
>
> But when I try to download some code from the jtag interface to the
> flash, I`m not able to generate a low signal at NCS0. Do I have to
> configurate the SMC controller????
>
> The flash that I used is AT49BV160 (with the same connections as in the
> datasheet from the controller (page 159).
>
> At the moment I configurate all clocks and the mode register from the
> SMC controller.
>
> // CKGR_MOR: Enable main oscillator
> _WDWORD(PMC+ 0x20, 0x0000FF01);
> _sleep_(100); // Wait for stable Main Oscillator
>
> // CKGR_PLLAR: Configure PLL A
> _WDWORD(PMC+ 0x28, 0x20483F0E);
> _sleep_(100); // Wait for stable PLL A
>
> // PMC_MCKR: MDIV and PRES fields
> _WDWORD(PMC+ 0x30, 0x00000000);
> _sleep_(100); // Wait for Main Master Clock ready
>
> // PMC_MCKR: all fields
> _WDWORD(PMC+ 0x30, 0x00000002);
> _sleep_(100);
>
> _WDWORD(0xFFFFEC0C,0x00021103); //control by nwe and nrd
>
> I`m working with the keil uvision, where I try to use the flash
> algorithm (for programming, erasing etc.) for the AT49xV16x4A (where
> the size is 2M and 16Bit).
>
> I hope someone of you could give me some advice to programm the flash.
>
> best regards
> Bernd
>
(You need to be a member of AT91SAM -- send a blank email to AT91SAM-subscribe@yahoogroups.com )