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Discussion Groups | LPC900 | LPC908 System Clock Problem - "Minimal" source code

Find help, specifications and source code for the LPC900. The LPC900 challenges Microchip and AVR based on the worlds most popular 8-bit architecture the 80C51. With a 2-clock core the LPC900 series is a high performance, very flexible and low cost 8-bit microcontroller family. Designers using or interested in these devices are encouraged to share their know-how and ask questions.

LPC908 System Clock Problem - "Minimal" source code - mshadow65 - Sep 21 9:49:28 2006

Hi Everyone

This is my "Minimal" source code for the clock problem on LP908
i mentioned.
The port p0.4 toggles @ 76uS instead of 69uS as expected
Do anyone can understand what is wrong?

I'M BECOMING CRAZY

Furno Gianluca
;--------------------------------------------------------------------
----------
;
;--------------------------------------------------------------------
----------
include "sfr908.inc"
;--------------------------------------------------------------------
----------
; SYSTEM CLOCK
;--------------------------------------------------------------------
----------
SYSCLOCK EQU 7372800
; SYSCLOCK EQU 6800000

dseg

ds 8 ; Bank 0-7

;------------------------------------------------------------
-------------
; RESET ENTRY-POINT
;------------------------------------------------------------
-------------
cseg

ljmp Start

;------------------------------------------------------------
-------------
; INTERRUPT TABLE
;------------------------------------------------------------
-------------
ljmp do_nothing ; (0003H) *
db 0,0,0,0,0
ljmp TickHandler ; (000BH) Timer 0
OverFlow

;------------------------------------------------------------
-------------
; EMPTY INTERRUPT HANDLER
;------------------------------------------------------------
-------------
do_nothing:
reti

;------------------------------------------------------------
-------------
; Start
;------------------------------------------------------------
-------------
Start:
anl TMOD,#0f0h
orl TMOD,#002h
mov TH0,#0
setb IE_TIMER0
setb TR0
setb IE_GLOBAL

;------------------------------------------------------------
-------------
; PORT 0
;------------------------------------------------------------
-------------

P0_DIR EQU 30H ; 1=OUTPUT, 0=INPUT
P0_IMODE EQU 00H ; 0=PULLUP, 1=HIGH IMPEDANCE
P0_OMODE EQU 30H ; 0=OPEN DRAIN, 1=PUSH PULL

mov P0M1,#BINNOT(P0_DIR)
mov P0M2,#0
orl P0M2,#P0_IMODE
orl P0M2,#P0_OMODE

;------------------------------------------------------------
-------------
; PORT 1
;------------------------------------------------------------
-------------

P1_DIR EQU 01H ; 1=OUTPUT, 0=INPUT
P1_IMODE EQU 00H ; 0=PULLUP, 1=HIGH IMPEDANCE
P1_OMODE EQU 01H ; 0=OPEN DRAIN, 1=PUSH PULL

mov P1M1,#BINNOT(P1_DIR)
mov P1M2,#0
orl P1M2,#P1_IMODE
orl P1M2,#P1_OMODE

;************************************************************
************
;
;
; Main Loop
;
;
;************************************************************
************
Loop: sjmp Loop

;------------------------------------------------------------
-------------
;
;
;
;------------------------------------------------------------
-------------
TickHandler:
cpl p0.4
;----------------------------------------------------
----------------
; Feeds the WatchDog
;----------------------------------------------------
----------------
mov WFEED1,#0A5H
mov WFEED2,#05AH
reti
FOSC EQU 3 ; default on unprogrammed parts: 3 =
internal RC oscillator
WDSE EQU 1 ; 0 = user can set WDCLK to select
clock source(default on unprogrammed part)
BOE EQU 1 ; Burn Down detect
RPE EQU 0 ; <0=> Disable (P1.5 can use as
input pin), <1=> Enable (P1.5 used as reset pin)
WDTE EQU 1 ; Watch-Dog

BOOTSTAT EQU 1
BOOTVEC EQU 01EH

SEC0 EQU 0
SEC1 EQU 0
SEC2 EQU 0
SEC3 EQU 0

_UCFG1 EQU FOSC | (WDSE << 4) | (BOE << 5) | (RPE << 6) | (WDTE << 7)
_UCFG2 EQU 0

;------------------------------------------------------------
-------------
; CONFIGURATION
;------------------------------------------------------------
-------------

rseg SFRA,CODE

db _UCFG1 ; place UCFG Bytes in hex file
db _UCFG2 ; reserved for future use
db BOOTVEC
db BOOTSTAT

rseg SFRB,CODE

db SEC0
db SEC1
db SEC2
db SEC3
end

;---------
; The End
;---------



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Re: LPC908 System Clock Problem - "Minimal" source code - yen0yuki - Sep 21 22:05:08 2006

I have simple question.

> anl TMOD,#0f0h
> orl TMOD,#002h
> mov TH0,#0

timer0 mode is selected "mode2".
then TH0 is auto reload value.
TH0=0 <- Is it OK?



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