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Discussion Groups | LPC900 | LPC952 Serial port 1 interrupt enable bug
Find help, specifications and source code for the LPC900. The LPC900 challenges Microchip and AVR based on the worlds most popular 8-bit architecture the 80C51. With a 2-clock core the LPC900 series is a high performance, very flexible and low cost 8-bit microcontroller family. Designers using or interested in these devices are encouraged to share their know-how and ask questions.
LPC952 Serial port 1 interrupt enable bug - Fausto Marzoli - Apr 20 3:20:15 2007
I found out another problem with using LPC952 serial port 1: the interrupt
enable bit is IEN2.2 and the IEN2 SFR address is D5H. (This is correct, as in
the datasheet).
But the ANL instruction seems not to work on this SFR.
I mean:
This code
IEN2 &= 0x04;
(ANL IEN2,#04H)
does NOT activate the interrupt enable bit, and the interrupt does not wotk
while this code below
IEN2 = 0x04;
(MOV IEN2,#04H)
seems to work correctly.
I think this is a bug in the chip, isn't it?
Is there any NXP (Philips) engineer here that can check this?
I am using a PLCC44 chip with the following mark:
P89LPC952FA
CF9568
TIG0627A
Regards,
Fausto
--
Fausto Marzoli - 8052.it - http://www.8052.it/
(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )
enable bit is IEN2.2 and the IEN2 SFR address is D5H. (This is correct, as in
the datasheet).
But the ANL instruction seems not to work on this SFR.
I mean:
This code
IEN2 &= 0x04;
(ANL IEN2,#04H)
does NOT activate the interrupt enable bit, and the interrupt does not wotk
while this code below
IEN2 = 0x04;
(MOV IEN2,#04H)
seems to work correctly.
I think this is a bug in the chip, isn't it?
Is there any NXP (Philips) engineer here that can check this?
I am using a PLCC44 chip with the following mark:
P89LPC952FA
CF9568
TIG0627A
Regards,
Fausto
--
Fausto Marzoli - 8052.it - http://www.8052.it/
(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )
Re: LPC952 Serial port 1 interrupt enable bug - Fausto Marzoli - Apr 20 12:21:29 2007
Alle 09:13, venerd́ 20 aprile 2007, Fausto Marzoli ha scritto:
> I think this is a bug in the chip, isn't it?
No, my fault again... the bug is in the Esacademy code architect that
generates an ANL instead of a ORL with the bitmask.
I was so "fused" after many hours in searching the SFR wrong address problem
that I had a brain-crash...... I did not note this when copying the Code
Architect source.
So, the only problem is that there is a wrong address for the S1CON in the
documentation and in the header file.
Fausto
--
Fausto Marzoli - 8052.it - http://www.8052.it/
(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )
> I think this is a bug in the chip, isn't it?
No, my fault again... the bug is in the Esacademy code architect that
generates an ANL instead of a ORL with the bitmask.
I was so "fused" after many hours in searching the SFR wrong address problem
that I had a brain-crash...... I did not note this when copying the Code
Architect source.
So, the only problem is that there is a wrong address for the S1CON in the
documentation and in the header file.
Fausto
--
Fausto Marzoli - 8052.it - http://www.8052.it/
(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )
Re: LPC952 Serial port 1 interrupt enable bug - phlpcmicro - Apr 20 12:55:45 2007
--- In l...@yahoogroups.com, Fausto Marzoli wrote:
>
> Alle 09:13, venerd́ 20 aprile 2007, Fausto Marzoli ha scritto:
>
> > I think this is a bug in the chip, isn't it?
>
> No, my fault again... the bug is in the Esacademy code architect that
> generates an ANL instead of a ORL with the bitmask.
>
> I was so "fused" after many hours in searching the SFR wrong address
problem
> that I had a brain-crash...... I did not note this when copying the
Code
> Architect source.
>
> So, the only problem is that there is a wrong address for the S1CON
in the
> documentation and in the header file.
>
> Fausto
>
> --
> Fausto Marzoli - 8052.it - http://www.8052.it/
>
=> Do very body a favor and inform Esacademy so code Architect can be
updated.
s...@codearchitect.org
http://www.esacademy.com/
If you haven't already done so.
Joe
(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )
>
> Alle 09:13, venerd́ 20 aprile 2007, Fausto Marzoli ha scritto:
>
> > I think this is a bug in the chip, isn't it?
>
> No, my fault again... the bug is in the Esacademy code architect that
> generates an ANL instead of a ORL with the bitmask.
>
> I was so "fused" after many hours in searching the SFR wrong address
problem
> that I had a brain-crash...... I did not note this when copying the
Code
> Architect source.
>
> So, the only problem is that there is a wrong address for the S1CON
in the
> documentation and in the header file.
>
> Fausto
>
> --
> Fausto Marzoli - 8052.it - http://www.8052.it/
>
=> Do very body a favor and inform Esacademy so code Architect can be
updated.
s...@codearchitect.org
http://www.esacademy.com/
If you haven't already done so.
Joe
(You need to be a member of LPC900_users -- send a blank email to LPC900_users-subscribe@yahoogroups.com )