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My testing with the AT89C51CC02U is almost complete. I am having a
problem with writing to the EEPROM. I looked at the errata for the
chip and made the changes but, the problem still exists. Here's what
I'm doing.
0. Get last location of DPTR from EEPROM
1. Take 16 bytes and write it to EEPROM. Two write cycles are used.
The first writes 4 bytes from lower 128 byte RAM segment and the
second writes 12 bytes from the higher 128 RAM segment. Works fine.
2. Then write 3 bytes to RAM to store the DPTR and a counter. Works fine.
3. Write the same 3 bytes to an address in EEPROM. Works if 128 byte
not exceed. The address gets written to the start of the next 128
byte location when I go past 7FH, 100H, 17FH, etc.
4. Read these 3 bytes to get the last location of DPTR in EEPROM
5. Repeat step 0

How do I get the EEPROM back to the same page that my counter is
stored on.

Here's the code.
e9: mov R0,#EE_EDPH ;point to location of last EEPROM address
mov DPH,@R0 ;store high value to DPTR DPH
mov R0,#EE_EDPL ;get lower byte value
mov DPL,@R0 ;store in DPTR DPL
mov A,Zone ;get zone number from lower RAM and
lcall ld_eeprom ;write to EEPROM latch
inc DPTR
mov A,DayType ;get DayType number and write to EEPROM latch
lcall ld_eeprom
inc DPTR
mov A,Event ;get Eventnumber and write to EEPROM latch
lcall ld_eeprom
inc DPTR
mov R1,#0DH ;Point to location of hours in upper RAM
mov R0,#BHour1
ev1: mov A,@R0 ;write to EEPROM latch and repeat until all
lcall ld_eeprom ;12 bytes have been latched
inc DPTR
inc R0
djnz R1,ev1
lcall wr_eeprom ;write to EEPROM
mov R0,#EE_EDPH ;store the location of EEPROM DPTR DPH to
upper RAM
mov @R0,DPH ;memory location
mov R0,#EE_EDPL ;store the location of EEPROM DPTR DPL to
upper RAM
mov @R0,DPL
;**read cycle was added to see if it would correct problem
mov DPTR,#0100H ;move pointer to location where the current
EEPROM
lcall rd_eeprom ;DPTR is store

mov R0,#EE_EDPH ;write DPH from upper RAM to EEPROM
mov A,@R0
lcall ld_eeprom
lcall wr_eeprom ;**problem exist whether or not the write
cycle was
inc DPTR ;was done after all 3 bytes were written to the
latch first
mov R0,#EE_EDPL
mov A,@R0
lcall ld_eeprom
lcall wr_eeprom
inc DPTR
mov R0,#EE_Ecounter1
inc @R0
mov A,@R0
lcall ld_eeprom
lcall wr_eeprom
lcall zsse12 ;put cursor on zone number
ret

rd_eeprom:
mov R5,IE
MOV EECON, #02h; map EEPROM in XRAM space
MOVX A, @DPTR
MOV EECON, #00h; unmap EEPROM
mov IE,R5
ret

ld_eeprom:
mov R5,IE
MOV EECON, #02h ; map EEPROM in XRAM space
MOVX @DPTR, A
nop
MOV EECON, #00h; unmap EEPROM
mov IE,R5
ret

wr_eeprom:
mov R5,IE
MOV EECON, #050h
MOV EECON, #0A0h
mov IE,R5
ret

Thanks,

Kirk



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On Tue, Mar 11, 2008 at 06:41:35PM -0000, robinson_kirk wrote:
> My testing with the AT89C51CC02U is almost complete. I am having a
> problem with writing to the EEPROM.

This is AVR related how?

--
David Kelly N4HHE, d...@HiWAAY.net
========================================================================
Whom computers would destroy, they must first drive mad.



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