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FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
timing constraints [2 Articles]
Rob Finch - Oct 12 2005
I have this line of code in my cpu:
wire [DBW*2-1:0] mul_o = opa * opb;
Is there a way I can tell the synthesizer (XST) that I'm allowing two
clock cycles for it to... 
Re: Digest Number 782 [2 Articles]
Tony - Sep 29 2005
I must have missed the start of your project, what CPU core are you using?
Sounds good ..
On Thursday 29 September 2005 12:25 pm, fpga-cpu@fpga... wrote:
>... it breathes - milestone [3 Articles]
Rob Finch - Sep 29 2005
Dual cpu system...
Got it working I think.
One cpu is constantly updating some characters on the screen, while
the other is running downloads and stuff. The "fun" p... System09 updates [5 Articles]
John Kent - Sep 18 2005
Just a notice to anyone playing with the System09 VHDL core,
There are a few updates to the CPU09 core.
JSR [0,S] did not work properly
The stack pointer was pre-dec... syscon speed
Rob Finch - Sep 18 2005
How fast are people getting system interconnects to work ? Using the
Spartan3 I can get the interconnect for my system to work only to
about 50 MHz. (There are a lot of wi... help req: poster session of my cpu
Umair siddiqui - Sep 13 2005
poster session is just another requirement of
university. since fpga related work was not completed,
i have to mainly present the simulation results.
ofcourse i'll pasting... help: a synchronizer issue... [4 Articles]
Umair siddiqui - Sep 4 2005
Please I need your urgent support, related to ACK_I
input of Wishbone bus...
I ve designed a CPU in vhdl (i am trying to release it
with name HPC-16 on OC)
supportin... server programming
Ashok - Aug 30 2005
I am designing a Server, which receives request on three different port
numbers. I have designed an Embedded System using Xilinx EDK(6.3)
tools. I am using Virtex2Pro P20 ... regarding fpga kit [2 Articles]
vlsi_siva447 - Aug 19 2005
hi this sankar
i am working presently in fpga implementation of
adaptive beamforming in smart antennas in the field of
wireless communication.pls suggest to me which fpga ... Re: RAM loading via JTAG [7 Articles]
Piotr Zbysinski - EP\\H\\ - Aug 18 2005
----- Original Message -----
From: Richard Duits
To: lpc2000@lpc2...
Sent: Thursday, August 18, 2005 1:15 AM
Subject: Re: [lpc2000] RAM loading via JTAG
Wh...