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FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
Pentium timing diagrams?
NeilS - Jun 28 2005
Hello everyone,
Just wondering if anyone has seen or has access to the timing diagrams
for the transactions between a 'classic' Pentium (3.3V core, 75 thru
200MHz) an... 
memec xilinx minimodules
Alex Gibson - Jun 28 2005
spartan3 and virtex4 FX
http://www.memec.com/?cmd=detail&articleid=2494
http://www.memec.com/?cmd=detail&articleid=2493
http://www.memec.com/uploaded/Spart... ST's new reconfigurable microcontroller [14 Articles]
Alex Gibson - Jun 27 2005
ST's new reconfigurable microcontroller with dual mac dsp
which has 16MBit DRAM, 300MHz ARM9, 600MHZ DSP, and a 150K FPGA,
Dual ethernet, ADC/DAC....
http://www... FW: Digest Number 754 [2 Articles]
- Jun 26 2005
Digilent has a video decoder board. It uses ADV7183B which take video
signal as input and generates YUV 4:2:2 format. But it does not have RGB
linear output.
I su... Digilentinc clearance sale
Alex Gibson - Jun 19 2005
Just noticed http://www.digilentinc.com/ are having a clearance sale on
their older boards(S2 and S2e).
Alex
... Parallel Port Programming Of Spartan IIE [3 Articles]
rtstofer - Jun 7 2005
Has anybody seen an app note that shows direct programming of a
Spartan IIE from a PC parallel port without using iMPACT, JTAG or an
intermediate device such as a CPLD?
... Optimal Hardware Implementation FIFO/LRU/Random Algos [5 Articles]
invincible1138 - Jun 3 2005
Hi all!
I want to know the most optimal way to implement FIFO/LRU/Random in
hardware. I am designing a cache and i need to implement these as
replacement algorithms.... low cost altera board - US$49
Alex Gibson - May 24 2005
http://www.futureelectronics.com/promos/cyclone/
http://www.futureelectronics.com/promos/cyclone/docs/Cyclone.pdf
No ram and limited peripherals.
Unfilled sp...