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FPGA-CPU

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

  

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More Butterfly Info

Rob Finch - Nov 15 2004
I plan to keep the following webpage updated with info on the Butterfly SoC. http://www.birdcomputer.ca/Projects/PrjButterflySoC/Butterfly_SoC.html ... More Butterfly Info

Butterfly processor info

Rob Finch - Nov 14 2004
Info on the processor used in my SoC: http://www.birdcomputer.ca/Cores/Butterfly32_info.html I have more docs on the way. It just takes time to put ... Butterfly processor info

implementing an SMP on an FPGA   [3 Articles]

invincible1138 - Nov 12 2004
Hi all! I am planning to implement an SMP system on a FPGA. I want a ready-made core that i can tweak a little for SMP support and add some glue logi... implementing an SMP on an FPGA

I got it working !!!   [3 Articles]

Rob Finch - Nov 11 2004
I got it working !!!! An SoC with cpu, video controller, uart, and a few other peripherals. The cpu is similar in concept to the gr0040's. The full featured ... I got it working !!!

Driving OFDDRRSE with clk_90   [4 Articles]

rtstofer - Oct 27 2004
The SRAM has a maximum access time of 10 nS and the clock has a period of 20 nS. That seems a little tight using clk_180 to gate ram_we or ram_ce. Could ... Driving OFDDRRSE with clk_90
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