This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
Hello Everybody I am Tobias, Student and Inventor
I was just about researching Open FPGA CPU Cores when I found this
list on http://www.fpgacpu.org/.
I...
Hello,
I'm working on the cloning of the TMS370 microcontroller by
Texas Instruments, in an Altera Cyclone Device.
I'd realy like to know if there are other...
Dear all,
I have a quick question. Does the Global clock buffer go to each and
every Flip Flop in the FPGA chip. I am using Actel SX-A device and
when I ran my ...
hi,
I am back with my cache problem.
[this is implementing a design using the microblaze using EDK tool
(xilinx Platform Studio].
Since there are fixed possible...
The only suggestions I have are:
- clean the pcb's pads and apply some flux from a kester solder pen ( it's very this stuff )
the Balls on the device contain fl...
Another option is to use the Thru-Hole Wirewrap socket: this is good because you can leave the power and gnd pins longer and cut the other IO pins short.....
This wi...
Of course not.....
But
- the wires that power the VCC rings were stabilized with larger low ERS caps.
- at every Red and White wire ( IO & Core vcc connects )...
Here are 2 pic's of my prototype that uses a xilinx virtex 300 BGA 350 somthing (lots)
pic 1 shows the IO VCC, Core VCC and the ground rings and the bypassing capa...
Just a quick question to those with soldering iron skills.
I am hand wiring a project using an fpbga package (FG860)!
I am mounting on a vector 8020 'circboar...
Hi,
I am working on the spartanIIe FPGA and making use of the microblaze
processor(EDK tool). My doubt is a very general one. basically the
microblaze document ...