Sign in

username:

password:



Not a member?

Search fpga-cpu



Search tips

Subscribe to fpga-cpu



Ads

fpga-cpu by Keywords

Altera | CISCifying | IDE | ISA | Java | JHDL | JTAG | LBU | MicroBlaze | PAR | PCI | RISC | SoC | Spartan | Transputers | Verilog | VHDL | Virtex | VLIW | WebPack | Xilinx | Xsoc | YARD-1A

Discussion Groups

FPGA-CPU

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

  

Post a new Thread

Webcast - Unified Verification Methodology

kowping - May 28 2003
An invitation from EEplace --------------- Online Webcast --------------- Title: Doing More With Less - Cadence Unified Verification Methodology (Engli... Webcast - Unified Verification Methodology

Calling a verilog-like package from VHDL   [2 Articles]

shaik afzal - May 28 2003
Hi all, Hope this is not an off-topic query. We have a set of VHDL Design files(Say VHDL1.Vhd,VHDL2.vhd etc.) and a VHDL Package(VHDL_pack.vhd) file. V... Calling a verilog-like package from VHDL

Xilinx announcement

Veronica Merryfield - May 24 2003
Some of you may have seen this already... At the Embedded Systems Conference this week, Xilinx (Nasdaq: XLNX) announced the release of new advanced features f... Xilinx announcement

Lisp Machine

Leon Heller - May 21 2003
Here is a useful web site on Lisp Machines: http://fare.tunes.org/LispM.html I've always lusted after a real one, but something on an FPGA that executes ... Lisp Machine

lisp machine anyone?   [8 Articles]

Campbell, John - May 19 2003
Hi Has anyone considered building LISP machine? I know that RISC is the orthodox religion of the day, but it seems to me that it might be fun to build a small LI... lisp machine anyone?

Register file and cache implementation

lalita_raghu - Apr 23 2003
Hi, For my MIPS-like pipelined processor, I have to implement a register file and a cache. I am stuck at both. I thought that I would implement an array ... Register file and cache implementation

reconfigurability of nios processor

siraj_ntu - Apr 11 2003
Hi, I am new to this board. I am trying to study the possibilty of reconfigurability of nios processor using the ucos/ii os. Can any one tel lme how i am suppos... reconfigurability of nios processor

Processor Capabilities   [2 Articles]

Michael Barrell - Mar 31 2003
Currently at my company we are getting ready to choose a new processor for a new project. Our list is short, but basically it is between the microblaze, nios and a ... Processor Capabilities

reconfigurable FPGA computing

Veronica Merryfield - Mar 26 2003
Thought the group make like to read this http://www.forbes.com/2003/03/25/cz_dl_0325star2.html -- Veronica Merryfield, somewhere in Cambridgeshire, UK "The ... reconfigurable FPGA computing

No Subject   [4 Articles]

sriram anand - Mar 24 2003
hi chirstian, I tried several sites including xilinx but all supported only PC's,nothing for SUN.So the question still stands. thnx, sriram Date: Sun, 23 ...
previous | 28 | 29 | 30 | 31 | 32 | 33 | 34 | 35 | 36 | 37 | 38 | 39 | 40 | 41 | 42 | 43 | 44 | 45 | 46 | 47 | next