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FPGA-CPU

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

  

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Frame Grabber using FPGA thru webcam   [37 Articles]

syyang85 - Dec 23 2007
Hello, I'm a student doing a project on implementing optical flow algorithm into FPGA. Basically, i would like to mount a camera ( preferably webcam coz its cheap) onto a FPG... Frame Grabber using FPGA thru webcam

Strange syntax   [13 Articles]

rtstofer - Dec 20 2007
In a project I didn't create there are expressions of the form: if (atmp+btmp)(8) = '1' then sr_c_ctrl ... Strange syntax

Inferred Priority Encoder In VHDL   [11 Articles]

rtstofer - Nov 28 2007
Consider something like: result ... Inferred Priority Encoder In VHDL

Re: Inferred Priority Encoder In VHDL   [3 Articles]

Charles Steinkuehler - Nov 28 2007
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 rtstofer wrote: > The Verilog might look like: > > assign result = (sig1 ? a : 1'b0) | > (sig2 ? b : 1'b0) | > (sig3 ... Re:  Inferred Priority Encoder In VHDL

use C++ int__64 type variables in NIOS IDE   [2 Articles]

paria354 - Nov 6 2007
does anyone know how to use C++ int__64 type variables when we want to implement it on NIOS IDE? coz IDE doesn't support upper than 32 bit integers.how can we use them in a bi... use C++ int__64 type variables in NIOS IDE

DCM multiplier / divider constant calculator tool

Rob Finch - Nov 3 2007
Really simple http://www.birdcomputer.ca/Software/DCMCalc.exe I got tired of guessing To post a message, send it to: f...@yahoogroups.com To unsubscribe, send a blank mes... DCM multiplier / divider constant calculator tool

Hirose FX2 Backplane ?   [6 Articles]

Rob Finch - Oct 20 2007
Is there a Hirose FX2 100 pin backplane or cabling available ? I'd like to connect some Nexys boards together. Robert To post a message, send it to: f...@yahoogroups.com ... Hirose FX2 Backplane ?

Re: FPGA routing - was - RE: Re: POP-11 (PDP-11/40 in an FPGA)   [4 Articles]

woodelf - Oct 16 2007
Austin Franklin wrote: > I'm not sure how long it's been since you've done any FPGA work, but though > that was true up through the 3k and less true with the 4k series of Xil... Re: FPGA routing - was - RE:  Re: POP-11 (PDP-11/40 in an FPGA)

Inquiry about FPGA and PowerPC codesign

=?GB2312?B?1cXT8dH0?= - Sep 25 2007
Hi all I am working on Xilinx ML310, with VirtexII pro fpga on it. Now I am trying to make the FPGA and PowerPC cores(embedded in VirtexII Pro) co-work. For example, build a f... Inquiry about FPGA and PowerPC codesign

FPGA Synthesis tool   [5 Articles]

Mukti Bansal - Sep 7 2007
Hi All, Can anyone suggest me a good FPGA synthesis tool to use. Thanks, ____________________________________________________________________________________ Sick... FPGA Synthesis tool
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