FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
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manj...@globaledgesoft.com - Jul 3 2007
I have designed actel's CoreMP7 subsystem using CoreConsole and generated a staple file using liberoIDE tool.
I am able to flash the staple file which i have obtained from the li... 
manj...@globaledgesoft.com - Jul 3 2007
need help on FPGA development on Actel's CoreMP7 board.
... 
N S - Jun 4 2007
One of my graduated student agreed to open his design
under the GPL.
I put the sample code "x86FPGA package" under my web.
http://www.ip-arch.jp/indexe.html
It requires:
s... 
N S - Jun 4 2007
One of my graduated student agreed to open his design
under the GPL.
I put the sample code x86FPGA.tar.gz under my web.
http://www.ip-arch.jp/indexe.html
It requires:
sfl2... 
Manuel Toledo Quinones - May 31 2007
Hi,
I want to introduce myself as new member of the list, and take
advantage of the opportunity to ask a question about Digilent's Nexys
Spartan 3 board. I purchase the 1000k ... 
Manish Kumar Shrivastava - May 25 2007
Hi,
mGinger.com pays you to read ads on your cellphone! These ads are only
about your interests.
Not only that, you get to decide when you want these ads.
Based on my calcula... 
ashfaq_bse - Mar 28 2007
hey people hop all of u ppl will b fine. i m a student of B.Sc. Computer
engineering. i m going to make a degree project of "8-bit microprocessor
based on MIPS architecture (RI... 
Rob Finch - Mar 4 2007
Have you ever looked at code guarded by mutexes and semaphores and
wondered, "what if the guarded code were placed in a RAM block that
ensured exclusive access to itself" ?
... 
Jan Gray - Feb 14 2007
My friends, the big action these days in loveable programming models for
shared memory synchronization is transactional memory.
http://www.cs.wisc.edu/trans-memory/biblio/index.... 
rtstofer - Dec 22 2006
I'm working on a project with the Spartan 3 Starter Board and the
Xilinx WebPack ISE version 8.2
As I look over the timing results, there are lengthy delays in the
paths conta... 
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