This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
Hi all,
These days, I am looking at JHDL ( http://www.jhdl.org ), although
it seems that there are a lot of issues to be solved itself, the JHDL is
still a...
On Tue, 2004-10-19 at 11:45, rtstofer wrote:
> Are there any free sources around for a floating point package that
> could be implemented on an FPGA?
The open-...
I've polished off the xr16vx microcontroller in JHDL, and
posted it, along with tools, tests and documentation:
http://www.easystreet.com/~mbutts/xr16vx_jhdl.htm...
Eric Laforest <> writes:
> Is it possible to generate a design that is explicitely placed and routed?
> (ie: this reg goes here, uses these tristate lines up to ...
I have my implementation of xr16 in JHDL running reliably on
my Insight XC2S100 board. It's running a C program which is
echoing serial in to serial out, and also t...
I've moved xr16vx up to rev 1.01. No changes to the source code.
I've fixed some doc errors, like the ones you found (thanks!),
and revised the xr16 ISA statements ...
My ISP is changing their setup so my xr16 in JHDL (xr16vx)
page will change. After Dec. 1 it's only at:
http://users.easystreet.com/mbutts/xr16vx_jhdl.html
...
A gdb debugging stub allows gdb to work on a processor through
a serial line. This article shows how simple it is.
http://www.redhat.com/devnet/articles/embedrem....
Here's a simple UART in JHDL that appears to
work, both in jab and on my Insight XC2S100
board. This code is released under the GPL.
Please distribute it, fix it,...
THE RIGHT TOOL FOR THE JOB
To achieve near-optimal FPGA cores it is often necessary to control both
technology mapping and placement of the circuit -- and to do ...