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FPGA-CPU
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
Search Results for "soc"
Re: POP-11 (PDP-11/40 in an FPGA)
rtstofer - Aug 22 2007
An Altera board that seems more than adequate would be the Cyclone II
FPGA Starter Development Kit. At $150 is is reasonable and has 8 MB
of SDRAM as well as 32KB of SRAM and 4 ... 
FYI: FPGA CPU Facebook group
Jan Gray - Jul 27 2007
http://www.facebook.com/group.php?gid=3040313103
Group Info Name: FPGA CPU and SoC Interest Group
Type: Internet & Technology - Computers & Hardware
Description: For designe... RE: Re: Microblaze In FPGA Virtex4 ML401?
Tommy Thorn - Jul 24 2007
Ok, I'll bite.
Having never used MicroBlaze, I'm curious about what makes the software development suite so special?
MicroBlaze and Nios II are both highly optimized for thei... [morphware] CALL FOR PAPERS
Reiner Hartenstein - Nov 16 2006
RC education 2007
The 2nd International Workshop on
Reconfigurable Computing Education
May 12, 2007, Porto Alegre,... [morphware] Calls for Papers - Conference Announcements
Reiner Hartenstein - Nov 10 2006
Call for Papers:
IDPT 2007
WORLD CONFERENCE ON
INTEGRATED DESIGN & PROCESS TECHNOLOGY
... [morphware] Call for Papers - Call for Attendees
Reiner Hartenstein - Sep 22 2006
Connected Thinking
(not only) to reduce energy consumption
Growing pervasiveness of microchips, bioinformatics,
high performance computing, etc.: W... [morphware] deadline for submissions: May 12 - Reconfigurable Computing
Reiner Hartenstein - May 9 2006
ReCoSoC'06
Reconfigurable Communication-centric SoCs
July 3 - 5, 2006, Montpellier, France
http://www.lirmm.fr/RECOSOC06/
deadline... Re: Query on FPGA testing after configure it.
juendme - Dec 18 2005
The best way to test an FPGA design running on the chip is to use one
of the on-chip analyzers. If you're using Altera's FPGAs, try
SignalTap II
( http://www.altera.com/p... Re: Wishbone comments - SimpCon [3 Articles]
Martin Schoeberl - Nov 24 2005
Hi Kolja and all,
>
>> to get a draft of your spec.
...
> The draft of the spec at the moment are few sketches on real
> paper - takes some time to draw all diagr... Wishbone comments [3 Articles]
Martin Schoeberl - Nov 23 2005
After implementing the Wishbone interface for main memory access
from JOP I see several issues with the Wishbone specification that
makes it not the best choice for SoC inte... server programming
Ashok - Aug 30 2005
I am designing a Server, which receives request on three different port
numbers. I have designed an Embedded System using Xilinx EDK(6.3)
tools. I am using Virtex2Pro P20 ... Re: FPGA soft processors at Hot Chips
James - Aug 15 2005
I'll be presenting Altera's Nios II at the conference Tuesday
afternoon.
Please come by and say "Hi" if you see me around.
+james+
--- In fpga-cpu@fpga..., Tommy ... Re: Low cost Altera board [2 Articles]
Tony - Jun 24 2005
Not fully understanding the differences in how different
vendors label their chips, would this be big enough to
expirement with some sort of SoC stuff, using 'smaller'
CPU... strange register behavior in Verilog blocks under Quartus II
lionheart_99_de - Mar 17 2005
Hello,
I'm quite new to FPGAs and SoC Design. My original working area was
hig level simulation and SW programming.
To get an insight of FPGA and SoC design I... Re: Experiences with the Altera UP3-board and NiosII
Tony - Feb 4 2005
>Message: 1
> Date: Thu, 03 Feb 2005 07:56:16 -0000
> From: "Mats Brorsson" <>
>Subject: Experiences with the Altera UP3-board and NiosII
>
>
>Hi,
> ... Re: What I want in an FPGA board [2 Articles]
Robert Finch - Dec 28 2004
> With the advent of the XC3S1000, it prompted me to wonder
> what I really wanted in an FPGA board.
> I'm getting tired of playing with 8 bit micro clones with PS2... Re: IP Redux [2 Articles]
Alex Gibson - Dec 27 2004
John Kent wrote:
>Matlab and Simulink would probably be the best examples of a
>GUI/integrated IDE with libraries.
>Protel and Labview are also getting into t... Re: loop counters
Rob Finch - Dec 27 2004
> Present in many DSP chips, e.g. Motorola 5600x, 563xx. There's no
> particular reason why you couldn't design one into a general-purpose
> processor.
>
> ... Memory Management [2 Articles]
Rob Finch - Dec 19 2004
What kind of memory management features do the NIOS / Microblaze
offer ? What would be appropriate for SoC systems ?
I've been working on a simple segmented ... Xilinx vs Altera / Microblaze vs Nios??? [5 Articles]
Mats Brorsson - Dec 14 2004
We are in the process of selecting an FPGA board for a series of
laborations in courses ranging from computer engineering, embedded
software development to ... Fwd: Re: IP Redux [2 Articles]
- Nov 25 2004
> >All, please read
> http://www.fpgacpu.org/log/sep02.html#IP-redux.
> Agree?
> >Disagree? Discuss :-)
> >
> >Jan.
Hi all, I've been lurking he... More Butterfly Info
Rob Finch - Nov 15 2004
I plan to keep the following webpage updated with info on the
Butterfly SoC.
http://www.birdcomputer.ca/Projects/PrjButterflySoC/Butterfly_SoC.html
... Butterfly processor info
Rob Finch - Nov 14 2004
Info on the processor used in my SoC:
http://www.birdcomputer.ca/Cores/Butterfly32_info.html
I have more docs on the way. It just takes time to put ... I got it working !!! [2 Articles]
Rob Finch - Nov 11 2004
I got it working !!!!
An SoC with cpu, video controller, uart, and a few other peripherals.
The cpu is similar in concept to the gr0040's. The full featured ... Re: Re: Floating Point Arithmetic [3 Articles]
Arius - Rick Collins - Oct 21 2004
At 12:14 PM 10/21/2004, you wrote:
>For the fun of it... I started wire-wrapping RTL back in the
>late '60s and I couldn't even imagine what it would take to bui... Re: few questions related to 16-bit cpu core design
rtstofer - Sep 17 2004
> - As a pro can you provide your insight/comments on
> project?
> - what architecture for core do you suggest?
There's nothing wrong with the starter board ex... Re: Simple Character CRT Core Needed [3 Articles]
John Kent - Aug 31 2004
Hi,
There is a simple 64 x 32 text character display in my System09 SOC.
It should be portable to the T80.
Getting 25 x 80 characters would need a bit more wor... Need help for Thesis
sharjeel_saeed - Jun 16 2004
Hi,
I want to do my Master's thesis in the field of SoCs but couldn't
find any nice projects. Can any of you recommend me some latest
ongoing research?
Bye, ... [ANN] Altera Cyclone EP1C12 FPGA Board
Martin Schoeberl - May 4 2004
The successful Cyclone EP1C6 FPGA module is now available with the larger
Cyclon EP1C12. The board is an ideal module for SoC design with soft-core
CPUs such as NIO... Re: Xsoc 16bit RISC
Jan Gray - Feb 20 2004
Sorry this message sat in the queue for so long, by the way.
(New members' messages get queued up until I approve them and unmoderate the
poster. (This policy, a... Re PLCC-84
Ed Corter - Feb 6 2004
Another option is to use the Thru-Hole Wirewrap socket: this is good because you can leave the power and gnd pins longer and cut the other IO pins short.....
This wi... RE: Re: BGA prototyping [3 Articles]
Austin Franklin - Feb 6 2004
> I'm doing something like it (much less complex) to wire up a
> SpartanXL PLCC-84 chip to a Philips LPC2106 ARM.
Hi Leon,
There are PLCC-84 sockets. If ... RE: prototyping
Austin Franklin - Feb 5 2004
> > Just a quick question to those with soldering iron skills.
> >
> > I am hand wiring a project using an fpbga package (FG860)!
> >
> > I am mounting on... Re: Emulation of Processor
Tommy Thorn - Dec 18 2003
Anand Gopal Shirahatti brought up an excellent point:
> Say I want to build a cycle accurate model of an
> exisiting processor. Say Intel 386 for example. Now
I ...