This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
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This, is the project that I was asking for compiler help about. I hope maybe a few people would like to join the project. It is a multithreaded high end/super computer. It has a mix of architectural features present in the P4 Xeon MP and the cray/tera MTA processor. It is like the MTA a VLIW processor with many threads. Ali http://www.opencores.org/projects/hmta |
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> This, is the project that I was asking for compiler help about. I > hope maybe a few people would like to join the project. It is a > multithreaded high end/super computer. It has a mix of architectural > features present in the P4 Xeon MP and the cray/tera MTA processor. > It is like the MTA a VLIW processor with many threads. Even though this sounds interesting I can not find anything on the linked page. Except of several links to other unfinished projects of you which are still in the planning stage. Does not seem to convincing to me.. |
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--- In fpga-cpu@y..., "Tim Boescke" <t.boescke@t...> wrote:
> > > This, is the project that I was asking for compiler help about. I > > hope maybe a few people would like to join the project. It is a > > multithreaded high end/super computer. It has a mix of architectural > > features present in the P4 Xeon MP and the cray/tera MTA processor. > > It is like the MTA a VLIW processor with many threads. > > Even though this sounds interesting I can not find anything > on the linked page. Except of several links to other unfinished > projects of you which are still in the planning stage. Does not > seem to convincing to me.. Well, I don't have CVS write access yet. And I only have two projects. I don't want to open source anything else. If no one helps with this I will soon take everything down from this project and do it in my spare time. Ali |