This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
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Dear all, I'm about to design an acquisition card based on the PCI bus. There are two different ways to implement the bus interface : - using a dedicated chip such as 9052 (PLX tech.) - using a FPGA I'm now looking for information about the way to interface PCI with a FPGA. Can somebody give me some tips on that subject? Thanks by advance Anthony Leroyer |
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Hi Anthony, To interface an FPGA with the PCI bus directly (hardwiring the FPGA to the bus), you have two possibilities: -Software IP: You can buy/download the code that implements inside your FPGA the interface you are looking for. It provides an easy interface between your user logic and the pci bus. The only thing you have to do is to instantiate the component in your VHDL/Verilog top file. *Free IP: you can download for free one of these designs from http://www.opencores.org/projects/pci/ *Commercial IP cores: Vendors like Altera or Xilinx offer you this kind of designs optimized for their FPGAs. The bad thing for soft-cores is that at power-up your device is not available in the pci bus until the FPGA has loaded the code for it. The good thing is that if there are improvements on the softcore you can upgrade it easily, your FPGA is a normal FPGA, so "cheap", and you can reuse the code if your chip dies or an upgrade to a bigger FPGA is required. -Hardware IP: some vendors like Lucent/Orca offer FPGAs with a hardwired pci core. It is a expensive FPGA and some people say that Orca will... probably not be among us for a long time (i take no part on this). The bad things for Hard-cores is that the chip is expensive and you are dedicating space inside the FPGA that you can not use for anything else than the core it-self. If your chip dies, you have to buy another expensive FPGA. Same problem for migration if you need a bigger FPGA The good thing is that you have a pci device even before the FPGA ends the programm loading. During this time you only have the configuration space of the device, but for some applications it can be enougth. Hope this help, David. Anthony Leroyer wrote: > Dear all, > > I'm about to design an acquisition card based on the PCI bus. > There are two different ways to implement the bus interface : > - using a dedicated chip such as 9052 (PLX tech.) > - using a FPGA > I'm now looking for information about the way to interface PCI with a FPGA. > Can somebody give me some tips on that subject? > > Thanks by advance > > Anthony Leroyer > > To post a message, send it to: > To unsubscribe, send a blank message to: -- ----------------------------------------------------------------- David Dominguez European Organization for Nuclear Research - CERN (PS-CO) Geneve, 23 CH-1211 (Switzerland) FAX: +41 22 767 91 45 TEL: +41 22 767 20 36 ----------------------------------------------------------------- |