This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
static variables in vhdl - gupta_vlsi2001 - Dec 12 23:59:00 2002
hi all
i have small doubt
while loop is sysnthesizable in leospec...
and how to declare static variablesin vhdl
advanced thanks
gupta ksrc
|

(You need to be a member of fpga-cpu -- send a blank email to fpga-cpu-subscribe@yahoogroups.com )