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Discussion Groups | FPGA-CPU | Re: Transputers [ was What are peoples opinion of theAltera Nios Processor? ]

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Re: Transputers [ was What are peoples opinion of theAltera Nios Processor? ] - Sergio Masci - Mar 21 10:05:00 2003

----- Original Message -----
From: John Kent <>
To: <>
Sent: Thursday, March 20, 2003 2:41 AM
Subject: Re: [fpga-cpu] Transputers [ was What are peoples opinion of
theAltera Nios Processor? ] > Hi Ben ...
>
> yes 8 MHz is fine ... I'll have a further poke around.
> I thought the standard Risc architecture had a register file
> of 32 x 32 bit registers, which makes for a largish machine.
> If I want MMU and cache I can go out and buy a commercial
> chip for a lot less money and bother :-)
>
> I had visions of designing a stripped down 68K with 4 x 32 bit data
> registers
> and 4 x 32 bit address registers and the basic 6800 dual operand
> instructions
> branches, jumps and a stack. But I'd have to write a compiler and
assembler
> to suit.

Actually sounds like you would really benefit from an assembler that would
let you easily expriment with the architecture. Something that would let you
play with instruction bit formats and language grammer to evaluate different
ideas without spending months writing assemblers or being tied to an
architecture because of a limited assembler.

Imagine an assembler that you could configure to accept a syntax as complex
as that of a Z80, or as simple as a 6502. Imagine tinkering with the Z80 and
adding extra registers with only a few minutes of effort. Or bending it to
allow special complex instructions, not macros, but instructions that
generate binary depending on the context in which the operands are
presented. Imagine doing all this with instruction descriptions that would
look at home in most CPU assembler documentation, no mystical bit patterns
in complex multilevel tables but instead high level BNF type descriptions
and easy to maintain (and experiment with) operand to instruction mappings.

XCASM is a meta assembler that does all this and much more. XCASM can be
found at http://www.xcprod.com

Regards
Sergio Masci




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