This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
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Hello, I am using FPGA compiler II to generate net list of a Verilog module. The module can be compiled without any error and I can find the Est. Frequency from the optimized chips. I want to know is it possible to know also the number of gates? If it is not possible, is there are any additional or other tools i can use to find the number of gates of a synthesized module. many thanks, /Ben IS-UEC [Non-text portions of this message have been removed] |