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Discussion Groups | FPGA-CPU | few questions related to 16-bit cpu core design

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

few questions related to 16-bit cpu core design - umairsiddiqui0800 - Sep 7 18:42:00 2004

I'm ee student, I want to built 16-bit cpu core for
final-year project.
for core, I have been studying x86 and RISC arch(s)
and cores (as completely cheating instructor is not possible!!!).
In addition my instructor is saying that I have
demontrate the cpu by
implementing on spartan3 starter kit (well there is no
problem to work with altera boards except cost,
max=$160)along with keyboard,vga support.
For this system, definitely there should be some OS
and as you know in spartan3 starter kit, except for
platform flash there is no permenent storage of data.

To get feel of computer, small CLI interface is also
required along with toy apps like texteditor

questions are:
- As a pro can you provide your insight/comments on
project?
- what architecture for core do you suggest?
- over-all time required to complete project?
- is spartan3 starter kit is suitable?
- what additional cores whould be required/need to
developed?(please links to these cores if possible)
- OS and compiler considerations?
- is any small permenent storage could be connected
to board extentions? kindly suggest a cheap solution
as extension boards are as expansive as board!
- scaling cpu to 32-bit would increase how much
complexity?
- what would be your plan for this project, please
list down the tasks in which you divide project? hope you will answer these questions :)





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Re: few questions related to 16-bit cpu core design - Goran Bilski - Sep 17 6:55:00 2004

Hi,

See below.

Göran

umairsiddiqui0800 wrote:

>I'm ee student, I want to built 16-bit cpu core for
>final-year project.
>for core, I have been studying x86 and RISC arch(s)
>and cores (as completely cheating instructor is not possible!!!).
>In addition my instructor is saying that I have
>demontrate the cpu by
>implementing on spartan3 starter kit (well there is no
>problem to work with altera boards except cost,
>max=$160)along with keyboard,vga support.
>For this system, definitely there should be some OS
>and as you know in spartan3 starter kit, except for
>platform flash there is no permenent storage of data.
>
>To get feel of computer, small CLI interface is also
>required along with toy apps like texteditor
>
>questions are:
>- As a pro can you provide your insight/comments on
>project?
>
Depending on the time that you have and your scope.

>- what architecture for core do you suggest?
>
Simple RISC tends to be easier to do.

>- over-all time required to complete project?
>
As stated before depends on the scope.
Will you do create an assembler. debugger, ...

>- is spartan3 starter kit is suitable?
>
Yes. That board is a nice one.

>- what additional cores whould be required/need to
>developed?(please links to these cores if possible)
>- OS and compiler considerations?
>
If you planning to port GCC, then it would take your months to do it.
SDCC is a simpler way of doing but less efficient.

>- is any small permenent storage could be connected
>to board extentions? kindly suggest a cheap solution
>as extension boards are as expansive as board!
>
The board has the platform PROM which can be used as program storage.

>- scaling cpu to 32-bit would increase how much
>complexity?
>
Doesn't really increase the complexity just the area size.
Instruction decoding can be easier with a 32-bit instruction word than
with a 16-bit instruction word.

>- what would be your plan for this project, please
>list down the tasks in which you divide project? >hope you will answer these questions :) >
>
>To post a message, send it to:
>To unsubscribe, send a blank message to:
>Yahoo! Groups Links




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Re: few questions related to 16-bit cpu core design - rtstofer - Sep 17 10:54:00 2004

> - As a pro can you provide your insight/comments on
> project?
> - what architecture for core do you suggest?

There's nothing wrong with the starter board except size. A fairly
straighforward 8 bit micro, 80x25 display and keyboard interface
BARELY fit. This is NOT a RISC machine so that may be the issue.
It is known that the MicroBlaze and a VDU fit - that comes preloaded!

> - over-all time required to complete project?

Building a processor from scratch - probably a couple of months
Writing an assembler/compiler/OS - a LOT longer particularly if the
OS has to include a file system. We're talking man-years!

> - is spartan3 starter kit is suitable?

See above. I plan to implement a Pascal P4 machine on this board -
if it will fit. 256k x 32 bits of RAM is interesting.

> - what additional cores whould be required/need to
> developed?(please links to these cores if possible)

There is a PS/2 interface at www.opencores.com but it is somewhat
limited.

There are VDU cores around - some tend to be large, others quite
compact. A large one comes with the starter board. It is quite
nice and probably took quite a while to write and debug.

Look at some of John Kent's work
http://members.optushome.com.au/jekent

> - OS and compiler considerations?

Porting a compiler/assembler/whatever is a HUGE project. If you can
get away with a 'toy' language and processor you might look at the
last chapters of Algorithms + Data Structures = Programs by Niklaus
Wirth. He presents a tiny Pascal like language complete with
compiler and interpreter.

Another approach is to implement some version of Basic - the
interpreter could be ROM based and internal to the FPGA.

You could buy the MicroBlaze development kit ($500) from Xilinx. It
has a 16 bit RISC, assembler and C compiler ready to go. Add a file
system and you're done.

Before I chose a processor design I would be certain of the
assembler/compiler/OS issues. These are far and away more complex
than implementing some tiny RISC processor.

> - is any small permenent storage could be connected

It is trivial to electrically connect an IDE hard disk to an FPGA if
the I/O pads are 5v tolerant or capable of accepting 5v signals
through current limiting resistors. The Spartan 2 can handle it and
I thing the Spartan 3 can as well. I just finished bringing CP/M
(an old OS) up on the T80 core (Z80 type) from opencores. Since I
had CP/M I also have a macro assembler, Basic, Fortran Compiler, C
Compiler, PL/I Compiler, etc. But it is an 8 bit core. Still, an
interesting process. It is running on a BurchED B5 board (300k
gates) and I am working on putting the keyboard and VDU in the
remaining 100k gates. It should fit.

> to board extentions? kindly suggest a cheap solution
> as extension boards are as expansive as board!

Diligent and Xilinx offer inexpensive breadboard items. I just
bought a solderless breadboard that fits the starter kit for $20.
There isn't a lot you need to add to the starter board. It has
keyboard input, VDU output, serial IO and a bunch of RAM (256kx32).
The way I see it you need to create an IDE interface and that is a
cake walk. You make the IDE registers accessible as ports from your
processor and all the interface sequencing is done at a high level -
in the BIOS of your OS. If you made a PCB for this it would cost
$51 (for 3 pieces, minimum) plus a few resistors and a couple of
connectors - one to the starter board and one to the IDE cable.

> - scaling cpu to 32-bit would increase how much
> complexity?

Well, it depends on the instruction set you intend to implement.
Wider isn't more difficult, it just takes more real estate. As I
see it, your entire problem is software, not hardware. Also, 32
bits means you can have a 24 bit address field - more than enough to
directly address all of memory. The advantage is that you wouldn't
have multi-word(byte) op codes. Every fetch would contain the
instruction, modifiers and the full address. Very handy! Also a
waste of space when the instruction is to OR a couple of registers.
So, if wasting memory concerns you then you can do what Control Data
did with their 60 bit words and pack up to 5 instructions in a
word. Much more difficult and memory is cheap - today!

Again, look at John Kent's work - his CPU is beautifully written and
its operation is apparent. Very clean! I would certainly use it as
a model.

> - what would be your plan for this project, please
> list down the tasks in which you divide project?

1) Ask to see/review prior projects to set limits on your project.
This is critical - your project description exceeds what I think
someone could do, as original work, in a year. Even integrating
prepared cores would take quite a bit of effort. Unless you buy
MicroBlaze!

2) Plan to never sleep again, have your food delivered, give up any
idea of a social life and limit the number of other classes you are
taking. Find talented people that aren't taking the same class to
help - feed them Pizza and beer and hope the code works! Or, put
together a team, if it is allowed, to share the efforts.

3) Seriously, resolve the OS and compiler/assembler issues first.

If you have to write a C compiler or something like that it can take
a year by itself. Porting GNU C is probably the way to go but the
processor has to be capable of handling all the issues that the
assembler will dictate. And it is HUGE!

Personally, I would try to get away with a ROM based, integer only,
BASIC. Darned if it didn't pop up at Google - search for "Li-Chen
Wang" and you get
http://www.4reference.net/encyclopedias/wikipedia/Li_Chen_Wang.html.

He wrote a Tiny Basic interpreter that took about 1k bytes IIRC and
invented the term "Copywrong". I used to use that code as a step in
developing for the early 8085s.

4) Another way to handle the assembler/compiler issue is to use the
development tools on Linux to create a tiny C language - see
Introduction To Compiler Construction With Unix by Schreiner &
Friedman. They present a small C language and build the compiler
with LEX and YACC (or their close cousins on Linux, Bison and
Flex). The output of the compiler is a string of pseudo
instructions that your processor would implement. Still, the issue
of program loading and IO is left as an excercise - and a difficult
one. That's why it is always omitted.

5) Consider using the PC as your storage device - seriously. For
your machine all programs will load at absolute addresses (unless
all addressing on your processor is relative - very cool), and can
be loaded from paper tape.

Then implement the concept of a paper tape drive with the PC and its
disk system. Use a serial port to communicate - create a simple
protocol like: "open file <name> as stream <yy>", "close file on
stream <yy>", etc. Obviously you can have more than one open stream
and you need to send packets with headers containing enough stream
info to sort it out - no sweat! This way you can have a huge file
system with a trivial interface from your processor. Slow, but
workable. And a neat way to do boot loading - your microcode can
execute just enough hardwired high level instructions to open a
stream and load some code. This could be handy even if you use it
just long enought to get the hard drive working!

I used Kermit extensively to port CP/M from my old machines with 8"
floppies, through the PC for storage and eventually onto the hard
drive of the FPGA based system. But CP/M is an OS, you don't have
one yet!

> hope you will answer these questions :)

Well, there are a few ideas. If I were you I would scrap them all!





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Re: few questions related to 16-bit cpu core design - erikc - Sep 17 17:47:00 2004



----- Original Message -----
From: "umairsiddiqui0800" <>
To: <>
Sent: Wednesday, September 08, 2004 00:42
Subject: [fpga-cpu] few questions related to 16-bit cpu core
design > I'm ee student, I want to built 16-bit cpu core for
> final-year project.
> for core, I have been studying x86 and RISC arch(s)
> and cores (as completely cheating instructor is not
possible!!!).

Don't even try to cheat. ;-)

You might want to consider building a stack machine suitable
for executing the FORTH language. FORTH is a very old, but
very simple and powerful language that normally runs on a
virtual machine the way that Java does. People have already
made (and sold) stack-based computers that implement the
FORTH primitive operations directly in hardware.

The main attractiveness of a stack machine is its simplicity
and "bang for the buck". Essentially, you have two stacks -
one is the normal subroutine return stack and the other is
the data or parameter stack. Most of the ordinary
arithmetic and logical operations operate by removing the
top one or two elements from the data stack, performing the
operatinn, and returning the result to the stack. These
three operations can parallelised so that the operation is
performed in just one clock cycle.

In addition, because the operands of common operations
reside on the data stack, there are no addressing modes like
you would find on a RISC or CISC machine. Just an opcode
which is almost always 8 bits or fewer, so two or three of
them could be packed into a 16-bit word. (Note that there
ARE operations for accessing data in memory). http://www.ece.cmu.edu/~koopman/stack_computers/ An on-line
book (which you can download) which details the underlying
principles and operation of stack machines.

http://216.239.39.104/search?q=cache:jD4tfYXXODUJ:www.comp.n
us.edu.sg/~yuenck/cs3220/design.doc++%22stack+machines%22&hl
=en - compares similarities between RISC and stack
machines.

Here is a page simply filled with links to sites discussing
FORTH and its implementation.
http://c2.com/cgi/wiki?ForthLanguage

http://madscientistroom.org/mippy/ - someone designing and
building his own FORTH machine (good reading).

Relevant Google search terms: "stack-machines",
"forth-machines", "forth-language".

The general idea is that FORTH as a language is based on
about 20..30 "primitive" operations (your machine's
instruction set") and everything else is layered on top of
that. > In addition my instructor is saying that I have
> demontrate the cpu by
> implementing on spartan3 starter kit (well there is no
> problem to work with altera boards except cost,
> max=$160)along with keyboard,vga support.
> For this system, definitely there should be some OS
> and as you know in spartan3 starter kit, except for
> platform flash there is no permenent storage of data.

> To get feel of computer, small CLI interface is also
> required along with toy apps like texteditor

A complete working FORTH system, with editor, compiler, and
debugging tools can be hosted in about 10Kb of code (this is
no shit -- people do not b elieve me when I say this, so
check it out). This is accomplished mainly by decomposing
the code into short, bite-sized subroutines and nesting them
deeply (sometimes even recursively). > questions are:
> - As a pro can you provide your insight/comments on
> project?
> - what architecture for core do you suggest?
> - over-all time required to complete project?
> - is spartan3 starter kit is suitable?
> - what additional cores whould be required/need to
> developed?(please links to these cores if possible)
> - OS and compiler considerations?
> - is any small permenent storage could be connected
> to board extentions? kindly suggest a cheap solution
> as extension boards are as expansive as board!
> - scaling cpu to 32-bit would increase how much
> complexity?
> - what would be your plan for this project, please
> list down the tasks in which you divide project? > hope you will answer these questions :)

Erikc

"Life's journey is not to arrive at the grave safely in a
well preserved body, but rather to skid in sideways, totally
worn out, shouting "...holy shit...what a ride!"




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Re: Re: few questions related to 16-bit cpu core design - John Kent - Sep 17 21:02:00 2004



rtstofer wrote:

>>- OS and compiler considerations?
>>
>>
>
>Porting a compiler/assembler/whatever is a HUGE project. If you can
>get away with a 'toy' language and processor you might look at the
>last chapters of Algorithms + Data Structures = Programs by Niklaus
>Wirth. He presents a tiny Pascal like language complete with
>compiler and interpreter. >
Just further to this, I notice Jan Gray has some links on
www.fpgacpu.org on the links page to
GCC and something called LCC which is a re-targetable C compiler. There
is a book available
to presumably show you how to re-target the compiler to other processors.

http://www.cs.princeton.edu/software/lcc/

>>- is any small permenent storage could be connected
>>
>>
>
>It is trivial to electrically connect an IDE hard disk to an FPGA if
>the I/O pads are 5v tolerant or capable of accepting 5v signals
>through current limiting resistors. The Spartan 2 can handle it and
>I thing the Spartan 3 can as well. I just finished bringing CP/M
>(an old OS) up on the T80 core (Z80 type) from opencores. Since I
>had CP/M I also have a macro assembler, Basic, Fortran Compiler, C
>Compiler, PL/I Compiler, etc. But it is an 8 bit core. Still, an
>interesting process. It is running on a BurchED B5 board (300k
>gates) and I am working on putting the keyboard and VDU in the
>remaining 100k gates. It should fit. Tony Burch actually sells an IDE interface board for his B5-X300. He
also sells a Compact
Flash interface board. It's pretty easy to write some code to read and
write sectors to the
the CF and put it in LBA mode. If you look around the web you may even
find some
C code for implementing a FAT16 file system in C for a Compact Flash. I
found a web
site by a German guy called Holgi who wrote a series of support files
for the Atmel ATMega32.
It includes a FAT12/16/32 File system.

http://home.t-online.de/home/holger.klabunde/avr/avrboard.htm#cf

John.

--
http://members.optushome.com.au/jekent
[Non-text portions of this message have been removed]



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Re: few questions related to 16-bit cpu core design - Tomasz Sztejka - Sep 20 1:49:00 2004

--- umairsiddiqui0800 <> wrote:

> I'm ee student, I want to built 16-bit cpu core for
(...)
> - what would be your plan for this project, please
> list down the tasks in which you divide project?

1. Get some projects, cpu's, catch idea about simplest
possible solution. You may read about microcontrollers -
they tend to be very simple. Clearly state your
requirements (ie. address space, data word width, speed,
FPGA usage, target applications).

2. Crawl the net in search for portable tools. You will
need at least assembler. If you don't get one, you will
have a lot of extra work.

3. Design instruction set. Always think about simplicity.
If you can keep with one and only one instruction format
then it is very good. Check if your instruction set is
complete. Don't forget about interrupts and multitasking.

4. Read about cell architecture of your FPGA. Check, how
many inputs and outputs it has - this will directly tell
you what logic blocks can fit in single cell and what
instructions can be easily done.

5. Sketch core. Check if it is optimal in terms of cell
use. Refine your instruction set if necessary. This moment
is good place to think about external interfaces.

6. Code core in verilog (I do recommend it over VHDL
because one can directly translate schematics into it). Run
simple simulations for your instruction set. Up to now you
don't need an assembler.

7. Start building your toolchain - assembler, eventually C
and debugger. Especially debugger will be helpfull.

8. When you are done, then, well... you are done :) This is
the moment when one usually says: "I should done it other
way, let's start once again."

If you need portable assembler and debugger take a look at
http://www.sztejkat.prv.pl , You will find both there. I
made them once, tested a little but did not used at real
work, so any external tester will be great help.

regards,
Tomasz Sztejka. ___________________________________________________________ALL-NEW Yahoo! Messenger - all new features - even more fun! http://uk.messenger.yahoo.com





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Re: few questions related to 16-bit cpu core design - Arius - Rick Collins - Sep 20 2:02:00 2004

At 07:42 PM 9/7/2004, you wrote:
>I'm ee student, I want to built 16-bit cpu core for
>final-year project.
>for core, I have been studying x86 and RISC arch(s)
>and cores (as completely cheating instructor is not possible!!!).
>In addition my instructor is saying that I have
>demontrate the cpu by
>implementing on spartan3 starter kit (well there is no
>problem to work with altera boards except cost,
>max=$160)along with keyboard,vga support.
>For this system, definitely there should be some OS
>and as you know in spartan3 starter kit, except for
>platform flash there is no permenent storage of data.
>
>To get feel of computer, small CLI interface is also
>required along with toy apps like texteditor
>
>questions are:
>- As a pro can you provide your insight/comments on
>project?
>- what architecture for core do you suggest?

A stack machine is very simple and can be debugged much more easily than a
register based machine because there are typically fewer instructions and
less complex opcodes. >- over-all time required to complete project?

That depends on a lot of things other than the CPU architecture. >- is spartan3 starter kit is suitable?

I think just about any FPGA with 1000 LUTs will do the job. But the board
depends on what you need as IO. Will you need a serial port? Or a
keyboard and monitor port? Or just a couple of LEDs? >- what additional cores whould be required/need to
>developed?(please links to these cores if possible)

www.opencores.org is a good place to start. >- OS and compiler considerations?

I would recommend Forth. If porting a compiler and OS is new to you, then
I expect you would find the learning curve for Forth to be a bit less. >- is any small permenent storage could be connected
>to board extentions? kindly suggest a cheap solution
>as extension boards are as expansive as board!

A simple Flash chip should suffice. Many boards already have a Flash chip
on board. >- scaling cpu to 32-bit would increase how much
>complexity?

Complexity is not the issue since the machine remains basically the
same. But obviously it takes about twice the number of gates. >- what would be your plan for this project, please
>list down the tasks in which you divide project?

1) List your requirements for the CPU. What is this CPU supposed to do
that make a difference in the design of the CPU?

2) Design (not code) the CPU based on these requirements.

3) Design your tests to verify that your design is working.

4) Code the CPU and tests, and simulate the CPU.

5) Once it is passing the tests (or the tests have been fixed :) you can
try downloading the design to the hardware.

6) Test the design with external inputs.

7) Design, code and test your assembler/compiler.

8) Start writing code to run through your compiler and test on the hardware.

9) Write your apps and verify that they work correctly.
Rick Collins
Arius - A Signal Processing Solutions Company
Specializing in DSP and FPGA design http://www.arius.com
4 King Ave 301-682-7772 Voice
Frederick, MD 21701-3110 301-682-7666 FAX



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Re: few questions related to 16-bit cpu core design - Martin Schoeberl - Oct 1 16:04:00 2004

> You might want to consider building a stack machine suitable
> for executing the FORTH language. FORTH is a very old, but
> very simple and powerful language that normally runs on a
> virtual machine the way that Java does. People have already
> made (and sold) stack-based computers that implement the
> FORTH primitive operations directly in hardware.

Stack machines are fine for FPGAs. However, than you can also implement a
more 'modern' machine as the JVM (Java Virtual Machine). Get started
with: JOP - a Java Processor core for FPGAs:
http://www.jopdesign.com/ > > In addition my instructor is saying that I have
> > demontrate the cpu by
> > implementing on spartan3 starter kit (well there is no

A fine coincidence: I got a Spartan-3 Starter Kit yesterday and ported
JOP today to this platform (I used Altera up to now). You can find a
Xilinx ISE project under xilinx/s3sk for JOP on this board.

The steps to get JOP running on this board are:

Download the JOP sources from: http://www.jopdesign.com/download.jsp
Compile the ISE project under ../xilinx/s3sk
Download JOP to the FPGA
Connect a serial cabel from your PC to the board
Open a command prompt in ../java/target
Change the COM-port in doit.bat
type: doit test test Clock

that's it, a small Java program should now run on your Spartan-3 board!

Martin





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Re: few questions related to 16-bit cpu core design - TAPAN JAIN - Oct 3 1:53:00 2004


hi
i wanted to know about ddr sdram core controller using

VHDL and what are the enhancement in xilinx xapp253
v2.3 in and what type improvement i will be done
thanks
__________________________________





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