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Discussion Groups | FPGA-CPU | a simple questions regarding memory implementation on the new "FPGA CPU and SoC design" paper

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

a simple questions regarding memory implementation on the new "FPGA CPU and SoC design" paper - oliver - Dec 7 6:59:00 2000



The article really opened my eye to RISC processor design!

I'm trying to do some simulation experiments to gain better understanding of the design. The article left out the detail of how ram16x16d was implemented, and as a non-Xilinix user I'm also puzzling over how RAMB4_S8_S8 module was implemented. Can anyone help me out ? Thanks. Oliver [Non-text portions of this message have been removed]




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RE: a simple questions regarding memory implementation on the new "FPGA CPU and SoC design" paper - Jan Gray - Dec 11 12:26:00 2000

Sorry about that. I will put out an update of the paper with the ram16x16d
and a model for the BRAM sometime tomorrow.

Jan Gray, Gray Research LLC



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