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This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

xsoc schematics in ISE WebPack - ts_oswald - Nov 30 23:21:00 2004




Hi -

I'm somewhat new to the fpga world and have been using the Xilinx ISE
WebPack version 6.2.03i with a Digilent D2FT board (Spartan XC2S300E).
To explore implementing a cpu on an fpga, I've downloaded the XSOC
Project Version Beta 0.93 and wanted to load into the ISE some of the
schematics. The Verilog files load fine (e.g. ctrl.v), but I'm having
no success on the schematic files (e.g. buf4.sch). When trying to load
them into ECS, I get the following:

Error : The file being read is a version ? type schematic file.
This software can read only version 4-6 type schematic files.

Does anyone know of a workaround for this error?

Thanks,
Scott



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