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This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
JTAG pins as I/O - Guilherme Jorge - Mar 29 17:05:00 2005
Hi everyone
How can i use the JTAG pins as I/O in my designs using Quartus II?
Thanks
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How can i use the JTAG pins as I/O in my designs using Quartus II?
Thanks
(You need to be a member of fpga-cpu -- send a blank email to fpga-cpu-subscribe@yahoogroups.com )
Re: JTAG pins as I/O - Antti Lukats - Mar 30 5:36:00 2005
--- In fpga-cpu@fpga..., "Guilherme Jorge" <guijorge@h...>
wrote:
> Hi everyone
>
> How can i use the JTAG pins as I/O in my designs using Quartus II?
> Thanks
http://wiki.openchip.org/index.php/OpenChip:JTAG_as_IO
a very brief description
http://gforge.openchip.org/projects/jtagasio/
a very simple example, take that code it is useable in Quartus
the TMS and TCK can be used as normal IO pins :)
just connect to the cyclone_jtag primitive
antti
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