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Discussion Groups | FPGA-CPU | Oddball bit widths
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
Oddball bit widths - Rob Finch - Nov 22 20:53:31 2006
I think I found a relatively painless way to handle oddball bit
widths, like 10 bit bytes, 20 bit instruction words, etc. when using
standard memory parts.
I struggled for a while trying to figure out how to implement fast
dividers, but they're not needed. Memory can be made to look like a
linear array simply by using a multiplier and a right shift.
Now to get that 10 bit processor working......
(You need to be a member of fpga-cpu -- send a blank email to fpga-cpu-subscribe@yahoogroups.com )
widths, like 10 bit bytes, 20 bit instruction words, etc. when using
standard memory parts.
I struggled for a while trying to figure out how to implement fast
dividers, but they're not needed. Memory can be made to look like a
linear array simply by using a multiplier and a right shift.
Now to get that 10 bit processor working......
(You need to be a member of fpga-cpu -- send a blank email to fpga-cpu-subscribe@yahoogroups.com )