Altera | CISCifying | IDE | ISA | Java | JHDL | JTAG | LBU | MicroBlaze | PAR | PCI | RISC | SoC | Spartan | Transputers | Verilog | VHDL | Virtex | VLIW | WebPack | Xilinx | Xsoc | YARD-1A

One of my graduated student agreed to open his design
under the GPL.

I put the sample code "x86FPGA package" under my web.

http://www.ip-arch.jp/indexe.html
It requires:
sfl2vl (convert SFL to Verilog),
Icarus Verilog,
NASM
and some other UNIX tools to run simulation.

We have ran FreeDOS under Icarus Verilog,
and also we ran a monitor program on ALTERA UP3 FPGA
board.

maybe I sent under the way email, sorry if you have
multiple copies.

Naohiko Shimizu,
IP ARCH, Inc.

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