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Discussion Groups | FPGA-CPU | Inquiry about FPGA and PowerPC codesign

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Inquiry about FPGA and PowerPC codesign - =?GB2312?B?1cXT8dH0?= - Sep 25 19:33:28 2007

Hi all

I am working on Xilinx ML310, with VirtexII pro fpga on it. Now I am trying
to make the FPGA and PowerPC cores(embedded in VirtexII Pro) co-work. For
example, build a filter in verilog HDL in FPGA, and set up PPC to do some
control work and other data processing.

After following the manual from xilinx (EDK 7.1 PowerPC Tutorial in
Virtex-4) and download the bit to FPGA, I got nothing on Terminal. When I
tried debug it with XMD, the program didn't stop at main() as I configued,
but keep runing like in a dead loop.

I am a fresh in this field so I don't know which part should be discribed in
detail. If u guys wanna talk about it with me by phone, I will
appreciate that a lot.
Thanks
--
Allen Yuyang Zhang
Ph.D Student
[Non-text portions of this message have been removed]


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