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This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Multiplying - Kolja Sulimma - Apr 11 1:32:00 2001

Hi!

After my above tirades about NOT using multiplies, here is what I think you should
do, if you really want to do DSP in an FPGA:

Build a vector CPU.

This way you can heavily pipeline your CPU without having to worry about data
dependencies.
If you do not worry about latency, you can multiply at 150 MHz or more in Virtex,
and I do not see why
the other parts of a vector processor should be slower than that. (Remember:
Effectively no data dependencies)

Reference:
Dave Patterson
UC Berkeley
IRAM Project.

CU,
Kolja




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