This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
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Lateley i have done some work on the altera NIOS softcore processor and in a flex
10ke -3 i could get a speed of about 17 Mhz, with a -1 flex i got about 30 Mhz. With most of my designs in Altera i can easily get 30Mhz in -3 devices (flex or apex) but only 70% filling and no large mux's etc. To get higher speeds you really have to do some hardwork with PAR in Altera's. Also the quality of your synthesizer is important. Most of the time i use Leonardo level 3 with reasonable results, FPGA express is a bit less.. You really need to have a close look at your design... critical timing paths, large mux's, large counters, try pipelining ,cliquing, etc With the cpu designs i have made in Xilinx spartans i have the feeling they ran quite a bit faster, 50~60 Mhz was easily obtained. The general "feeling" i have: Altera's 30 Mhz is possible above you really have to tweak everything. Xilinx's 40 Mhz no problem, after that you also have to put in lot of efforts. good luck ron proveniers @ Philips ALC lab components [Non-text portions of this message have been removed] |