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Discussion Groups | FPGA-CPU | Re: Need debugging suggestions

This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).

Re: Need debugging suggestions - Ben Franchuk - Dec 12 18:18:00 2001

rtfinch35 wrote:
>
> I'm trying to debug a processor in an FPGA that I can't get to work
> at all. It works beautifully in ModelSim. I have tried stubbing out
> the processor and using a hard coded state machine that mimics the
> processor signals and this seems to work, so I am pretty sure basic
> signals like clock, reset, etc. are working properly. Can you give me
> any ideas how to debug this ?
>
> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone...
ARG!!!!!
Here's $.10 for a used APPLE ][. You get everything even BASIC.

I can't help you with debugging with a FPGA emulator a I did my
debugging of real hardware. If you are using real hardware with
a FPGA download cable make sure your memory and boot strap system
works.8 leds here does wonders. If you have no internal FPGA problems
like stupid errors, debug reset and then a BRA/JUMP instruction.
Later Memory load #, and branch on condition.
>From there you then can
start to test instructions step by step by writing short programs.
if XXX works jump here and halt
else jump there and halt

--
Ben Franchuk --- Pre-historic Cpu's --
www.jetnet.ab.ca/users/bfranchuk/index.html



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Re: Re: Need debugging suggestions - Ben Franchuk - Dec 12 21:47:00 2001

Tim Boescke wrote:
> Anything beyond 1MHz is sufficient :)

2 Mhz is typical of what real 65xx/68xx parts are out there.
2 Mhz is also what is needed for HD floppy disk (1.44M) for a
a system with out DMA. 3 MHZ is as fast I can run and even then I
need two wait states for I/O access using standard TTL decoding.
Since I use a 6809 style of clocking my cpu runs with a 12 Mhz clock.
I can't push it to 4 Mhz as the floppy disc chip is too slow.
--
Ben Franchuk --- Pre-historic Cpu's --
www.jetnet.ab.ca/users/bfranchuk/index.html
PS. does anybody know of a cheap 6502/68xx dumb terminal kit
that uses a vga and ibm keyboard?





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Need debugging suggestions - rtfinch35 - Dec 13 7:12:00 2001

I'm trying to debug a processor in an FPGA that I can't get to work
at all. It works beautifully in ModelSim. I have tried stubbing out
the processor and using a hard coded state machine that mimics the
processor signals and this seems to work, so I am pretty sure basic
signals like clock, reset, etc. are working properly. Can you give me
any ideas how to debug this ?

Thanks Rob http://www.birdcomputer.ca

PS. the processor is a 6502 clone...





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Re: Need debugging suggestions - Keith Shapiro - Dec 13 8:21:00 2001

Rob,

Have you tried using the back-annotated file (after synthesis) in the
simulation?

If your RTL works, and your back-annotation works, then try the following:

Verify with a scope that you've got correct voltages on all of the power
pins for your FPGA and all of your RAMs. Verify that you're correctly
programming the FPGA. Verify that you've got a clean clock signal at the
pins.

If necessary, bring a couple of important signals up to the top level and
route them to pins. Then you can check them on a logic analyzer and
verify against your stimulus with the simulation.

Keith

On Thu, 13 Dec 2001, rtfinch35 wrote:

> I'm trying to debug a processor in an FPGA that I can't get to work
> at all. It works beautifully in ModelSim. I have tried stubbing out
> the processor and using a hard coded state machine that mimics the
> processor signals and this seems to work, so I am pretty sure basic
> signals like clock, reset, etc. are working properly. Can you give me
> any ideas how to debug this ?
>
> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone... >
> To post a message, send it to:
> To unsubscribe, send a blank message to: --
Keith D. Shapiro

http://www.torilive.org/




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Re: Need debugging suggestions - Eric Werness - Dec 13 9:06:00 2001

I'd suggest trying a couple of things. First, try running it with clk/1M or some
such thing so that you can be sure that you're not violating timing specs. Then,
I'd say try starting with the basic framework and then adding functionality from
there e.g. every instruction is read as a mov instruction, then as an ALU
instruction, then decoding, etc, etc. I used roughly that technique to bring up a
simple CPU design on my new XSA-100 board.
~Eric

rtfinch35 wrote:

> I'm trying to debug a processor in an FPGA that I can't get to work
> at all. It works beautifully in ModelSim. I have tried stubbing out
> the processor and using a hard coded state machine that mimics the
> processor signals and this seems to work, so I am pretty sure basic
> signals like clock, reset, etc. are working properly. Can you give me
> any ideas how to debug this ?
>
> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone...
>
> To post a message, send it to:
> To unsubscribe, send a blank message to:





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Re: Need debugging suggestions - Anand Gopal Shirahatti - Dec 13 9:32:00 2001



U have not mentioned u did the timing simulation or the
functional simulation.
Also not mentioned how did u conclude that the processor is not working and about u r test environment.
If u can give me furhter details I may be able to help u more.As of now I am sending a URL, Download the PDF file.
The URL is
www.ee.byu.edu/~grahamp/byu-etd/psg-diss.pdf
the name of article is
"Logical hardware debuggers for FPGA based systems"
It's good one.
Hope that Helps.
Anand. On Thu, 13 Dec 2001 rtfinch35 wrote :
> I'm trying to debug a processor in an FPGA that I can't
> get to work
> at all. It works beautifully in ModelSim. I have tried
> stubbing out
> the processor and using a hard coded state machine that
> mimics the
> processor signals and this seems to work, so I am
> pretty sure basic
> signals like clock, reset, etc. are working properly.
> Can you give me
> any ideas how to debug this ?
>
> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone... >
> To post a message, send it to:
> To unsubscribe, send a blank message to:
>
>
>



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Re: Need debugging suggestions - Goran Bilski - Dec 13 10:43:00 2001

Hi,

If you are targeting a Xilinx device, chipscope is the simple answer.
Without it the debugging of MicroBlaze would have taken much much much longer
time.
You almost get a ModelSim but in the target instead.
When you started to use, you never want to debug hardware in another way. Göran Bilski rtfinch35 wrote:

> I'm trying to debug a processor in an FPGA that I can't get to work
> at all. It works beautifully in ModelSim. I have tried stubbing out
> the processor and using a hard coded state machine that mimics the
> processor signals and this seems to work, so I am pretty sure basic
> signals like clock, reset, etc. are working properly. Can you give me
> any ideas how to debug this ?
>
> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone...
>
> To post a message, send it to:
> To unsubscribe, send a blank message to:






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RE: Need debugging suggestions - Manoj Viswambharan - Dec 13 11:36:00 2001

Rob,

If you have any spare IO pins (hopefully connected to some test points), you
can bring out signals using the probe command in FPGA Editor:

http://support.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=
1&getPagePath=6616

This is a slow process, but is doesn't require any logic gates (which
Chipscope does).

Regards,
Manoj -----Original Message-----
From: Goran Bilski [mailto:]
Sent: Thursday, December 13, 2001 10:43 AM
To:
Subject: Re: [fpga-cpu] Need debugging suggestions Hi,

If you are targeting a Xilinx device, chipscope is the simple answer.
Without it the debugging of MicroBlaze would have taken much much much
longer
time.
You almost get a ModelSim but in the target instead.
When you started to use, you never want to debug hardware in another way. Göran Bilski rtfinch35 wrote:

> I'm trying to debug a processor in an FPGA that I can't get to work
> at all. It works beautifully in ModelSim. I have tried stubbing out
> the processor and using a hard coded state machine that mimics the
> processor signals and this seems to work, so I am pretty sure basic
> signals like clock, reset, etc. are working properly. Can you give me
> any ideas how to debug this ?
>
> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone...
>
> To post a message, send it to:
> To unsubscribe, send a blank message to: To post a message, send it to:
To unsubscribe, send a blank message to:




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Re: Need debugging suggestions - Tim Boescke - Dec 13 13:51:00 2001


> Thanks Rob http://www.birdcomputer.ca
>
> PS. the processor is a 6502 clone...

Is it cycle accurate ? If yes it would be very
tempting to implement a full VCS2600 on FPGA.
Probably even a moderate Spartan II would be
enough to hold processor, TIA, RIOT und even
several game modules.






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Re: Need debugging suggestions - rtfinch35 - Dec 13 20:41:00 2001

Thanks for all the good suggestions. I seem to have found the major
problem after many hours of debugging, and the processor is executing
a small test program. Serial communications work much better if you
actually connect the cable between the devices. It seems at some
point I got worried about tripping over the cable, so I disconnected
it :) The test program simply polls for an incoming character on the
serial port and echos it back to the host. (five lines of code).

No, the processor isn't cycle accurate. It's about 50% cycle
accurate. I'll be posting more info on my website shortly. Branches
always execute in two cycles, store operations take an extra cycle
over the original. Most of the single byte opcodes take only two
cycles as per the original. I've got the processor running at 25MHz
although post PAR reports it should do over 30. Before I added the
BCD arithmetic it would have done over 40MHz. I've got the size down
to about 720 LUTs (7k gates) which means it might even fit in a old
XC4010XL. Once I've verified the processor is working, I'll post it
on my website as an .edn module, cheap but not free.

I was thinking of implementing something similar to the VIC20. I
think the game modules likely won't fit in the FPGA. There is only
about 7 kibi bytes of memory in the FPGA. --- In fpga-cpu@y..., "Tim Boescke" <t.boescke@t...> wrote:
>
> > Thanks Rob http://www.birdcomputer.ca
> >
> > PS. the processor is a 6502 clone...
>
> Is it cycle accurate ? If yes it would be very
> tempting to implement a full VCS2600 on FPGA.
> Probably even a moderate Spartan II would be
> enough to hold processor, TIA, RIOT und even
> several game modules.





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Re: Re: Need debugging suggestions - Tim Boescke - Dec 13 23:45:00 2001


> No, the processor isn't cycle accurate. It's about 50% cycle
> accurate. I'll be posting more info on my website shortly. Branches
> always execute in two cycles, store operations take an extra cycle
> over the original. Most of the single byte opcodes take only two

So a STA $xxxx takes 5 cycles ?

> cycles as per the original. I've got the processor running at 25MHz
> although post PAR reports it should do over 30. Before I added the

Anything beyond 1MHz is sufficient :)

> I was thinking of implementing something similar to the VIC20. I
> think the game modules likely won't fit in the FPGA. There is only
> about 7 kibi bytes of memory in the FPGA.

The average VCS2600 game module is 4 kb ! There are even 2kb modules.

It has 128 bytes of memory, a few video regs, I/O, a timer and thats
it.. no video memory.



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Re: Re: Need debugging suggestions - David Spencer - Jan 29 10:55:00 2002


rtfinch35 wrote:
> I'll post it
> on my website as an .edn module, cheap but not free. >>>PS. the processor is a 6502 clone... Hmm watch out for copyright issues. You wouldn't (I doubt) have any

problems putting it up for free for "research" purposes but if you're

intending to sell it you might need to license it. The 6502 design is

hardly your own.
--
David Spencer
www.curlypi.com




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Re: Re: Need debugging suggestions - Ben Franchuk - Jan 29 20:40:00 2002

rtfinch35 wrote:
>> It depends what you mean by "design". I wrote the Verilog source for
> the processor completely from scratch, in that sense it is truely
> original. If you are referring to the ISA, then yes it is true, I did
> not design the ISA. It is interesting to note (as I understand it)
> that the original 6502 designers based the instruction set on a
> simplified version of the 6809.

The 6809 is a descendant of the 6800. The 6502 came first. Some people
do say the
6502 is 8 bit version of the PDP-11. I don't find the 6502 as clean as
the
6800.

> I note also that there are other free 6502 (along with several other
> processors) cores available via the internet, which is one of the
> reasons I feel fairly safe posting this one.

I think what really is needed is a video display system in a FPGA.
A floppy disk controller would be nice too.

--
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html


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Re: Re: Need debugging suggestions - Ben Franchuk - Jan 29 21:40:00 2002

rtfinch35 wrote:
>
> >
> > I think what really is needed is a video display system in a FPGA.
> > A floppy disk controller would be nice too.
> >
> What kind of display support would you be looking for
> (requirements) ? I've posted a simple text mode VGA controller that
> runs out of block ram in the FPGA, with my 6502 project. I'm
> currently working on a VGA controller for another project, that
> supports both text and graphics modes. It uses a 32 bit wide memory
> bus, so the controller is organized around that.

I will have to take a look at that.
What I would like to do is a dumb terminal someday.
Rather than just test I will have overlays: Bottom -- graphics middle -
text - top sprites mice and menus.

> A basic IDE/ATA disk controller is easy to interface to an FPGA. The
> control registers are already built into the drives, so all you need
> to do is decode an address range.

Spare Floppies I have. A working IDE does not exist around here. I have
SCSII drives that keep going and going ... :)

> Rob
>
> To post a message, send it to:
> To unsubscribe, send a blank message to:

--
Ben Franchuk - Dawn * 12/24 bit cpu *
www.jetnet.ab.ca/users/bfranchuk/index.html





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Re: Re: Need debugging suggestions - Tim Boescke - Jan 30 16:57:00 2002


> > I'll post it
> > on my website as an .edn module, cheap but not free.
> >
>
> >>>PS. the processor is a 6502 clone... > Hmm watch out for copyright issues. You wouldn't (I doubt) have any
> problems putting it up for free for "research" purposes but if you're
> intending to sell it you might need to license it. The 6502 design is

Well, since the architecture of his 6502 clone is probably
very different from the original one, and all patents have
expired anyways, the only copyright issue could be on
the ISA.

Is something like an ISA really a unique creation which is
covered by copyright ? AFAIR most disputes about cloned
cpus where about patent issues and architecture.

How about all the 8051 clones for example ? How about software
emulators ?

Any counterexamples ?



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