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Discussion Groups | FPGA-CPU | Re: VLIW processors anyone?
This list is for discussion of the design and implementation of field-programmable gate array based processors and integrated systems. It is also for discussion and community support of the XSOC Project (see http://www.fpgacpu.org/xsoc).
Re: VLIW processors anyone? - Tommy Thorn - Mar 17 21:42:00 2002
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On Sunday 17 March 2002 16:43, Reinoud wrote: > There are several ways around this. One obvious approach is > clustering (a cluster is basically a small VLIW section with full > bypassing and register ports, that is only loosely coupled with > other sections). Another less obvious approach is to explicitly > program the bypass busses (which allows for a huge reduction in > bypass _and_ register file port cost!). Hint, see: > > http://ce-serv.et.tudelft.nl/MOVE/ > > (Disclaimer: that's where I work, although on an interesting and > mostly unpublished new arch variety.) Ah, the secret is out :-) I agree that transport triggered architectures would be superior. Attached is a toy 3-issue implementation (in Handel-C) of a TTA cpu which computes Fibonacci. This runs at 50 Mhz on my XSA-100 Spartan 2 board. Obviously this 40 minute hack could be done better and more complete, but it illustrates that: - Transport triggered (A.K.A. MOVE) architectures are very easy to implement and modify. - They require almost no logic for decoding and can be made to run very fast. One has to be careful though to encode the moves tightly to avoid a horrific code density (on average, one RISC instruction takes two moves). IMHO, the major factor holding TTA back is the lack of available compilers and the difficulty of rolling your own. Enjoy, Tommy __________________________________________________ [Non-text portions of this message have been removed] |
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Re: VLIW processors anyone? - Tommy Thorn - Mar 17 21:47:00 2002
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Sorry, it seems my attachment got stripped. To avoid wasting yet more bandwidth, I've made it available at http://meko.dk/~thorn/tta-fibo.c /Tommy __________________________________________________ |
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