Discussion group dedicated to the Philips LPC2000 family of ARM MCUs
crossworks gcc dissassembly - rseku - Nov 3 3:47:00 2005
Below is a view of code received in crossworks dissassembly in
interleaved mode:
IO0CLR = IOW; // Toggle IOW-signal
4A10 ldr r2, [pc, #16]
2308 mov r3, #8
6013 str r3, [r2, #0]
IO0SET = IOW;
4A10 ldr r2, [pc, #16]
2308 mov r3, #8
6013 str r3, [r2, #0]
I think I0CLR has different address then I0SET. Is it possible, that the
same code will produce the same result (if yes I would think ARM &
crossworks are very smart)
robert

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Re: crossworks gcc dissassembly - nosp...@... - Nov 3 4:32:00 2005
>Below is a view of code received in crossworks dissassembly in
>interleaved mode:
>IO0CLR = IOW; // Toggle IOW-signal
> 4A10 ldr r2, [pc, #16]
> 2308 mov r3, #8
> 6013 str r3, [r2, #0]
> IO0SET = IOW;
> 4A10 ldr r2, [pc, #16]
> 2308 mov r3, #8
> 6013 str r3, [r2, #0]
>I think I0CLR has different address then I0SET. Is it possible, that the
>same code will produce the same result (if yes I would think ARM &
>crossworks are very smart)
PC will be diffrent in each case - therefore I cannot see a problem?
Regards,
Richard.
http://www.FreeRTOS.org

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Re: crossworks gcc dissassembly - Rob Jansen - Nov 3 4:40:00 2005
Robert,
> I think I0CLR has different address then I0SET. Is it possible, that the
> same code will produce the same result (if yes I would think ARM &
> crossworks are very smart)
I think you mean "different result" and yes it is - and it's not that
smart ...
> IO0CLR = IOW; // Toggle IOW-signal
> 4A10 ldr r2, [pc, #16]
> 2308 mov r3, #8
> 6013 str r3, [r2, #0]
The ldr r2,[pc, #16] will load R2 with the content of PC + 16. You will
find a 32 bits address value at that memory location.
The same thing applies for the "IO0SET = IOW" you showed.
Although the code is exactly the same, the value read into R2 will be
different since the Program Counter has a different value.
Rob

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