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Hello everyone,
I 'm able to work the GNU compiler provided with keil on LPC 214x.
I used the staup code provided with the gnu examples of keil. There
was no issues.
I tried running a small application on LPC 2468. After compiling when
i try to debug it in debug mode it ends up in an infinite loop within
this 3 lines shown below.

0x0000007C E5903008 LDR R3,[R0,#0x0008]
0x00000080 E2133B01 ANDS R3,R3,#0x00000400
0x00000084 0AFFFFFC BEQ 0x0000007C

This doesn't happen with the other lpc 214x series. Can anyone please
tell me why this happens.
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

--- In l...@yahoogroups.com, "urjust2oocool" wrote:
>
> Hello everyone,
> I 'm able to work the GNU compiler provided with keil on LPC 214x.
> I used the staup code provided with the gnu examples of keil. There
> was no issues.
> I tried running a small application on LPC 2468. After compiling when
> i try to debug it in debug mode it ends up in an infinite loop within
> this 3 lines shown below.
>
> 0x0000007C E5903008 LDR R3,[R0,#0x0008]
> 0x00000080 E2133B01 ANDS R3,R3,#0x00000400
> 0x00000084 0AFFFFFC BEQ 0x0000007C
>
> This doesn't happen with the other lpc 214x series. Can anyone please
> tell me why this happens.
>

Register values?

Bit 10 at the location pointed to by [R0 plus 8]is not getting set.
What is [R0 plus 8] pointing at on the 214x? What is [R0 plus 8]
pointing at on the 2468?

Rgds,
Martin

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

dear james,

This is the assembly code that generates.

0x00000000=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000004=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000008=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x0000000C=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000010=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000014=A0 E1A00000=A0 NOP=A0=A0=A0=A0=A0=A0=20
0x00000018=A0 E51FFFF0=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#-0x0FF0]
0x0000001C=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000020=A0 00000058=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R8,ASR R0
0x00000024=A0 00000040=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R0,ASR #32
0x00000028=A0 00000044=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R4,ASR #32
0x0000002C=A0 00000048=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R8,ASR #32
0x00000030=A0 0000004C=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R12,ASR #32
0x00000034=A0 00000000=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R0
0x00000038=A0 00000050=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R0,ASR R0
0x0000003C=A0 00000054=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R4,ASR R0
0x00000040=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000040
0x00000044=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000044
0x00000048=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000048
0x0000004C=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x0000004C
0x00000050=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000050
0x00000054=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000054
0x00000058=A0 E59F00D0=A0 LDR=A0=A0=A0=A0=A0=A0 R0,[PC,#0x00D0]
0x0000005C=A0 E3A010AA=A0 MOV=A0=A0=A0=A0=A0=A0 R1,#0x000000AA
0x00000060=A0 E3A02055=A0 MOV=A0=A0=A0=A0=A0=A0 R2,#0x00000055
0x00000064=A0 E3A03024=A0 MOV=A0=A0=A0=A0=A0=A0 R3,#0x00000024
0x00000068=A0 E5803004=A0 STR=A0=A0=A0=A0=A0=A0 R3,[R0,#0x0004]
0x0000006C=A0 E3A03001=A0 MOV=A0=A0=A0=A0=A0=A0 R3,#0x00000001
0x00000070=A0 E5803000=A0 STR=A0=A0=A0=A0=A0=A0 R3,[R0]
0x00000074=A0 E580100C=A0 STR=A0=A0=A0=A0=A0=A0 R1,[R0,#0x000C]
0x00000078=A0 E580200C=A0 STR=A0=A0=A0=A0=A0=A0 R2,[R0,#0x000C]
0x0000007C=A0 E5903008=A0 LDR=A0=A0=A0=A0=A0=A0 R3,[R0,#0x0008]
0x00000080=A0 E2133B01=A0 ANDS=A0=A0=A0=A0=A0 R3,R3,#0x00000400
0x00000084=A0 0AFFFFFC=A0 BEQ=A0=A0=A0=A0=A0=A0 0x0000007C

Raj

--- On Mon, 10/27/08, mjames_doveridge wrote:
From: mjames_doveridge
Subject: [lpc2000] Re: Startup code working with lpc214x and not with lpc24=
68
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 11:22 AM

=20=20=20=20
--- In lpc2000@yahoogroups .com, "urjust2oocool" @ ...> wrote:

>

> Hello everyone,

> I 'm able to work the GNU compiler provided with keil on LPC 214x.

> I used the staup code provided with the gnu examples of keil. There

> was no issues.=20

> I tried running a small application on LPC 2468. After compiling when

> i try to debug it in debug mode it ends up in an infinite loop within

> this 3 lines shown below.=20

>=20

> 0x0000007C E5903008 LDR R3,[R0,#0x0008]

> 0x00000080 E2133B01 ANDS R3,R3,#0x00000400

> 0x00000084 0AFFFFFC BEQ 0x0000007C

>=20

> This doesn't happen with the other lpc 214x series. Can anyone please

> tell me why this happens.

>

Register values?

Bit 10 at the location pointed to by [R0 plus 8]is not getting set.=20

What is [R0 plus 8] pointing at on the 214x? What is [R0 plus 8]

pointing at on the 2468?

Rgds,

Martin

=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

--- In l...@yahoogroups.com, Cool Dude wrote:
>
> dear james,
>
> This is the assembly code that generates.
>

Register values?

Bit 10 at the location pointed to by [R0 plus 8]is not getting set.
What is [R0 plus 8] pointing at on the 214x? What is [R0 plus 8]
pointing at on the 2468?

Read the above again. Then get the register values, esp. R0. Compare
the R0 value against the register map of both processors in the user
manuals. You might want to start with the section on the PLL.
Rgds,
Martin

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

>
> Read the above again. Then get the register values, esp. R0. Compare
> the R0 value against the register map of both processors in the user
> manuals. You might want to start with the section on the PLL.
>

Oh, and look at your startup code *source listing*, (not the
disassembly), where the purpose of the loop should be commented.

Rgds,
Martin

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Dear martin,
I cannot watch the execution taking place in startup code. It goes direct to the disassembly window. Maybe because I'm using GNU compile not sure.

Raj

--- On Mon, 10/27/08, mjames_doveridge wrote:
From: mjames_doveridge
Subject: [lpc2000] Re: Startup code working with lpc214x and not with lpc2468
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 1:36 PM

>

> Read the above again. Then get the register values, esp. R0. Compare

> the R0 value against the register map of both processors in the user

> manuals. You might want to start with the section on the PLL.

>

Oh, and look at your startup code *source listing*, (not the

disassembly) , where the purpose of the loop should be commented.

Rgds,

Martin

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

DEAR MARTIN,
There is a change in R0 value=A0 at point of time. It is mention against th=
e code below. Please check
0x00000000=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000004=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000008=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x0000000C=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000010=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000014=A0 E1A00000=A0 NOP=A0=A0=A0=A0=A0=A0=20
0x00000018=A0 E51FFFF0=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#-0x0FF0]
0x0000001C=A0 E59FF018=A0 LDR=A0=A0=A0=A0=A0=A0 PC,[PC,#0x0018]
0x00000020=A0 00000058=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R8,ASR R0
0x00000024=A0 00000040=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R0,ASR #32
0x00000028=A0 00000044=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R4,ASR #32
0x0000002C=A0 00000048=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R8,ASR #32
0x00000030=A0 0000004C=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R12,ASR #32
0x00000034=A0 00000000=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R0
0x00000038=A0 00000050=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R0,ASR R0
0x0000003C=A0 00000054=A0 ANDEQ=A0=A0=A0=A0 R0,R0,R4,ASR R0
0x00000040=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000040
0x00000044=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000044
0x00000048=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000048
0x0000004C=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x0000004C
0x00000050=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000050
0x00000054=A0 EAFFFFFE=A0 B=A0=A0=A0=A0=A0=A0=A0=A0 0x00000054
0x00000058=A0 E59F00D0=A0 LDR=A0=A0=A0=A0=A0=A0 R0,[PC,#0x00D0]
0x0000005C=A0 E3A010AA=A0 MOV=A0=A0=A0=A0=A0=A0 R1,#0x000000AA
0x00000060=A0 E3A02055=A0 MOV=A0=A0=A0=A0=A0=A0 R2,#0x00000055
0x00000064=A0 E3A03024=A0 MOV=A0=A0=A0=A0=A0=A0 R3,#0x00000024
0x00000068=A0 E5803004=A0 STR=A0=A0=A0=A0=A0=A0 R3,[R0,#0x0004]
0x0000006C=A0 E3A03001=A0 MOV=A0=A0=A0=A0=A0=A0 R3,#0x00000001
0x00000070=A0 E5803000=A0 STR=A0=A0=A0=A0=A0=A0 R3,[R0]
0x00000074=A0 E580100C=A0 STR=A0=A0=A0=A0=A0=A0 R1,[R0,#0x000C]
0x00000078=A0 E580200C=A0 STR=A0=A0=A0=A0=A0=A0 R2,[R0,#0x000C]

0x0000007C=A0 E5903008=A0 LDR=A0=A0=A0=A0=A0=A0 R3,[R0,#0x0008] /*At this p=
oint the value of R0 in LPC214x is 0x524 and for LPC2468 is 0x5000024.

0x00000080=A0 E2133B01=A0 ANDS=A0=A0=A0=A0=A0 R3,R3,#0x00000400
0x00000084=A0 0AFFFFFC=A0 BEQ=A0=A0=A0=A0=A0=A0 0x0000007C
0x00000088=A0 E3A03003=A0 MOV=A0=A0=A0=A0=A0=A0 R3,#0x00000003

Why is there a change like tht

Raj

--- On Mon, 10/27/08, mjames_doveridge wrote:
From: mjames_doveridge
Subject: [lpc2000] Re: Startup code working with lpc214x and not with lpc24=
68
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 1:33 PM

=20=20=20=20
--- In lpc2000@yahoogroups .com, Cool Dude =
wrote:

>

> dear james,

>=20

> This is the assembly code that generates.

>=20

Register values?

Bit 10 at the location pointed to by [R0 plus 8]is not getting set.

What is [R0 plus 8] pointing at on the 214x? What is [R0 plus 8]

pointing at on the 2468?

Read the above again. Then get the register values, esp. R0. Compare

the R0 value against the register map of both processors in the user

manuals. You might want to start with the section on the PLL.=20=20=20

Rgds,

Martin

=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

--- In l...@yahoogroups.com, Cool Dude wrote:
>
> DEAR MARTIN,
> There is a change in R0 value=A0 at point of time. It is mention
against the code below. Please check

Neither value makes any sense.

I would expect a different value, 0xE01FC080, say - it has to be a
hardware register base address since the loop continually reads {r0+8]
waiting for bit to clear.

How are you reading the R0 value?

Did you read the user manual or look at the startup source code?

Rgds,
Martin

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

> waiting for bit to clear.

Should have been 'waiting for bit to get set':

0x0000007C E5903008 LDR R3,[R0,#0x0008] // read some register
0x00000080 E2133B01 ANDS R3,R3,#0x00000400 // examine bit 10
0x00000084 0AFFFFFC BEQ 0x0000007C // loop if result zero
Sorry,
Martin

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Are you using lpc214x startup code on an lpc2468? Thats not gonna work.
it needs a slightly different method of setting up the clock.

--Ray

urjust2oocool wrote:
>
> Hello everyone,
> I 'm able to work the GNU compiler provided with keil on LPC 214x.
> I used the staup code provided with the gnu examples of keil. There
> was no issues.
> I tried running a small application on LPC 2468. After compiling when
> i try to debug it in debug mode it ends up in an infinite loop within
> this 3 lines shown below.
>
> 0x0000007C E5903008 LDR R3,[R0,#0x0008]
> 0x00000080 E2133B01 ANDS R3,R3,#0x00000400
> 0x00000084 0AFFFFFC BEQ 0x0000007C
>
> This doesn't happen with the other lpc 214x series. Can anyone please
> tell me why this happens.
>
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Dear Ray,
I got it working in my Keil simulater by just changing the PLLLOCK bit from=
10th bit to 26th bit and my problem was solved. But i cannot get it workin=
g on my Board. Gues=A0 the PLL didnt get configured the way it has to be...=
CAn you help me.

Raj

--- On Mon, 10/27/08, Ray Molenkamp wrote:
From: Ray Molenkamp
Subject: Re: [lpc2000] Startup code working with lpc214x and not with lpc24=
68
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 6:49 PM

=20=20=20=20
Are you using lpc214x startup code on an lpc2468? Thats not gon=
na work.

it needs a slightly different method of setting up the clock.

--Ray

urjust2oocool wrote:

>

> Hello everyone,

> I 'm able to work the GNU compiler provided with keil on LPC 214x.

> I used the staup code provided with the gnu examples of keil. There

> was no issues.

> I tried running a small application on LPC 2468. After compiling when

> i try to debug it in debug mode it ends up in an infinite loop within

> this 3 lines shown below.

>

> 0x0000007C E5903008 LDR R3,[R0,#0x0008]

> 0x00000080 E2133B01 ANDS R3,R3,#0x00000400

> 0x00000084 0AFFFFFC BEQ 0x0000007C

>

> This doesn't happen with the other lpc 214x series. Can anyone please

> tell me why this happens.

>

>=20=20
=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

hello Martin,
You were rite. I was able to rectify the problem. (R0_0x08) pointed to PLLS=
TAT register. It was supposed to point to the PLLLOCK bit which would get s=
et after the PLL gets stable. In LPC214x PLLLOCK bit=A0 is the 10bit but in=
LPC2468 is the 26th bit. Did changes accordingly and it started working on=
the simulater. Thanks for that. But now the problem is that i cannot get i=
t working in my board. Guess there are some more configurations to be made.
Raj

--- On Mon, 10/27/08, mjames_doveridge wrote:
From: mjames_doveridge
Subject: [lpc2000] Re: Startup code working with lpc214x and not with lpc24=
68
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 1:36 PM

=20=20=20=20
>=20

> Read the above again. Then get the register values, esp. R0. Compare

> the R0 value against the register map of both processors in the user

> manuals. You might want to start with the section on the PLL.=20=20=20

>=20

Oh, and look at your startup code *source listing*, (not the

disassembly) , where the purpose of the loop should be commented.

Rgds,

Martin

=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

You cannot use the header files you are using for the 214x for the 24xx
although
most registers have the same name they are sometimes located at a
different address.

NXP has a bundle of sample code for the 23xx/24xx i suggest you download
that
from their site and work from there.

--Ray

Cool Dude wrote:
>
> hello Martin,
> You were rite. I was able to rectify the problem. (R0_0x08) pointed to
> PLLSTAT register. It was supposed to point to the PLLLOCK bit which
> would get set after the PLL gets stable. In LPC214x PLLLOCK bit is
> the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and
> it started working on the simulater. Thanks for that. But now the
> problem is that i cannot get it working in my board. Guess there are
> some more configurations to be made.
> Raj
>
> --- On Mon, 10/27/08, mjames_doveridge > > wrote:
> From: mjames_doveridge >
> Subject: [lpc2000] Re: Startup code working with lpc214x and not with
> lpc2468
> To: l...@yahoogroups.com
> Date: Monday, October 27, 2008, 1:36 PM
>
> > > Read the above again. Then get the register values, esp. R0. Compare
>
> > the R0 value against the register map of both processors in the user
>
> > manuals. You might want to start with the section on the PLL.
>
> > Oh, and look at your startup code *source listing*, (not the
>
> disassembly) , where the purpose of the loop should be commented.
>
> Rgds,
>
> Martin
>
> [Non-text portions of this message have been removed]
>
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hey i got that board working using GNU compiler of Keil. Had to do more of =
changes with the startup code. The PLL configuration of LPC2468=A0 is sligh=
tly different from the LPC214x series. Thanks to everyone who helped me.

Raj

--- On Mon, 10/27/08, Ray Molenkamp wrote:
From: Ray Molenkamp
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with l=
pc2468
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 8:03 PM

=20=20=20=20
You cannot use the header files you are using for the 214x for =
the 24xx

although

most registers have the same name they are sometimes located at a

different address.

NXP has a bundle of sample code for the 23xx/24xx i suggest you download

that

from their site and work from there.

--Ray

Cool Dude wrote:

>

> hello Martin,

> You were rite. I was able to rectify the problem. (R0_0x08) pointed to

> PLLSTAT register. It was supposed to point to the PLLLOCK bit which

> would get set after the PLL gets stable. In LPC214x PLLLOCK bit is

> the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and

> it started working on the simulater. Thanks for that. But now the

> problem is that i cannot get it working in my board. Guess there are

> some more configurations to be made.

> Raj

>

> --- On Mon, 10/27/08, mjames_doveridge
> > wrote:

> From: mjames_doveridge m>>

> Subject: [lpc2000] Re: Startup code working with lpc214x and not with

> lpc2468

> To: lpc2000@yahoogroups .com

> Date: Monday, October 27, 2008, 1:36 PM

>

> >

>

> > Read the above again. Then get the register values, esp. R0. Compare

>

> > the R0 value against the register map of both processors in the user

>

> > manuals. You might want to start with the section on the PLL.

>

> >

>

> Oh, and look at your startup code *source listing*, (not the

>

> disassembly) , where the purpose of the loop should be commented.

>

> Rgds,

>

> Martin

>

>

>

>

>

>

>

>

>

>

>

> [Non-text portions of this message have been removed]

>

>=20=20
=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hello Ray,Martin,
I tried using interrupt to blink an LED using a timer but the interrupt service routine is not getting serviced. The code is working perfectly with Keil arm compiler.
So it has to work perfectly if the startup for interrupt is configured correctly. Can you help me by giving some checklist that i 've to check in the startup code to get the interrupt serviced.
As of now immediately after after the interrupt is generated(due to timer) the control goes to the begining to the begining of startup code i think because i can see the PLLFEED all getting executed. Why is that.

Raj

--- On Mon, 10/27/08, Ray Molenkamp wrote:
From: Ray Molenkamp
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with lpc2468
To: l...@yahoogroups.com
Date: Monday, October 27, 2008, 8:03 PM

You cannot use the header files you are using for the 214x for the 24xx

although

most registers have the same name they are sometimes located at a

different address.

NXP has a bundle of sample code for the 23xx/24xx i suggest you download

that

from their site and work from there.

--Ray

Cool Dude wrote:

>

> hello Martin,

> You were rite. I was able to rectify the problem. (R0_0x08) pointed to

> PLLSTAT register. It was supposed to point to the PLLLOCK bit which

> would get set after the PLL gets stable. In LPC214x PLLLOCK bit is

> the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and

> it started working on the simulater. Thanks for that. But now the

> problem is that i cannot get it working in my board. Guess there are

> some more configurations to be made.

> Raj

>

> --- On Mon, 10/27/08, mjames_doveridge
> > wrote:

> From: mjames_doveridge >

> Subject: [lpc2000] Re: Startup code working with lpc214x and not with

> lpc2468

> To: lpc2000@yahoogroups .com

> Date: Monday, October 27, 2008, 1:36 PM

>

> >

>

> > Read the above again. Then get the register values, esp. R0. Compare

>

> > the R0 value against the register map of both processors in the user

>

> > manuals. You might want to start with the section on the PLL.

>

> >

>

> Oh, and look at your startup code *source listing*, (not the

>

> disassembly) , where the purpose of the loop should be commented.

>

> Rgds,

>

> Martin

>

>

>

>

>

>

>

>

>

>

>

> [Non-text portions of this message have been removed]

>

>

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Have you sorted out your startup code issues and compensated
that vicvectaddr is at a different address for the 24xx ?

--Ray

Cool Dude wrote:
>
> Hello Ray,Martin,
> I tried using interrupt to blink an LED using a timer but the
> interrupt service routine is not getting serviced. The code is working
> perfectly with Keil arm compiler.
> So it has to work perfectly if the startup for interrupt is configured
> correctly. Can you help me by giving some checklist that i 've to
> check in the startup code to get the interrupt serviced.
> As of now immediately after after the interrupt is generated(due to
> timer) the control goes to the begining to the begining of startup
> code i think because i can see the PLLFEED all getting executed. Why
> is that.
>
> Raj
>
> --- On Mon, 10/27/08, Ray Molenkamp > > wrote:
> From: Ray Molenkamp > >
> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not
> with lpc2468
> To: l...@yahoogroups.com
> Date: Monday, October 27, 2008, 8:03 PM
>
> You cannot use the header files you are using for the 214x for the 24xx
>
> although
>
> most registers have the same name they are sometimes located at a
>
> different address.
>
> NXP has a bundle of sample code for the 23xx/24xx i suggest you download
>
> that
>
> from their site and work from there.
>
> --Ray
>
> Cool Dude wrote:
>
> > > hello Martin,
>
> > You were rite. I was able to rectify the problem. (R0_0x08) pointed to
>
> > PLLSTAT register. It was supposed to point to the PLLLOCK bit which
>
> > would get set after the PLL gets stable. In LPC214x PLLLOCK bit is
>
> > the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and
>
> > it started working on the simulater. Thanks for that. But now the
>
> > problem is that i cannot get it working in my board. Guess there are
>
> > some more configurations to be made.
>
> > Raj
>
> > > --- On Mon, 10/27/08, mjames_doveridge >
> > > wrote:
>
> > From: mjames_doveridge > 40tuthill. com>> > Subject: [lpc2000] Re: Startup code working with lpc214x and not with
>
> > lpc2468
>
> > To: lpc2000@yahoogroups .com > Date: Monday, October 27, 2008, 1:36 PM
>
> > > > > > > Read the above again. Then get the register values, esp. R0. Compare
>
> > > > the R0 value against the register map of both processors in the user
>
> > > > manuals. You might want to start with the section on the PLL.
>
> > > > > > Oh, and look at your startup code *source listing*, (not the
>
> > > disassembly) , where the purpose of the loop should be commented.
>
> > > Rgds,
>
> > > Martin
>
> > > > > > > > > > > > > [Non-text portions of this message have been removed]
>
> > > [Non-text portions of this message have been removed]
>
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hey Ray,
Thanx.. ISR issue also got solved.:)

Raj

--- On Tue, 10/28/08, Ray Molenkamp wrote:
From: Ray Molenkamp
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with lpc2468
To: l...@yahoogroups.com
Date: Tuesday, October 28, 2008, 6:12 PM

Have you sorted out your startup code issues and compensated

that vicvectaddr is at a different address for the 24xx ?

--Ray

Cool Dude wrote:

>

> Hello Ray,Martin,

> I tried using interrupt to blink an LED using a timer but the

> interrupt service routine is not getting serviced. The code is working

> perfectly with Keil arm compiler.

> So it has to work perfectly if the startup for interrupt is configured

> correctly. Can you help me by giving some checklist that i 've to

> check in the startup code to get the interrupt serviced.

> As of now immediately after after the interrupt is generated(due to

> timer) the control goes to the begining to the begining of startup

> code i think because i can see the PLLFEED all getting executed. Why

> is that.

>

> Raj

>

> --- On Mon, 10/27/08, Ray Molenkamp
> > wrote:

> From: Ray Molenkamp
> >

> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not

> with lpc2468

> To: lpc2000@yahoogroups .com

> Date: Monday, October 27, 2008, 8:03 PM

>

> You cannot use the header files you are using for the 214x for the 24xx

>

> although

>

> most registers have the same name they are sometimes located at a

>

> different address.

>

> NXP has a bundle of sample code for the 23xx/24xx i suggest you download

>

> that

>

> from their site and work from there.

>

> --Ray

>

> Cool Dude wrote:

>

> >

>

> > hello Martin,

>

> > You were rite. I was able to rectify the problem. (R0_0x08) pointed to

>

> > PLLSTAT register. It was supposed to point to the PLLLOCK bit which

>

> > would get set after the PLL gets stable. In LPC214x PLLLOCK bit is

>

> > the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and

>

> > it started working on the simulater. Thanks for that. But now the

>

> > problem is that i cannot get it working in my board. Guess there are

>

> > some more configurations to be made.

>

> > Raj

>

> >

>

> > --- On Mon, 10/27/08, mjames_doveridge
>

> > > wrote:

>

> > From: mjames_doveridge
> 40tuthill. com>>

>

> > Subject: [lpc2000] Re: Startup code working with lpc214x and not with

>

> > lpc2468

>

> > To: lpc2000@yahoogroups .com

>

> > Date: Monday, October 27, 2008, 1:36 PM

>

> >

>

> > >

>

> >

>

> > > Read the above again. Then get the register values, esp. R0. Compare

>

> >

>

> > > the R0 value against the register map of both processors in the user

>

> >

>

> > > manuals. You might want to start with the section on the PLL.

>

> >

>

> > >

>

> >

>

> > Oh, and look at your startup code *source listing*, (not the

>

> >

>

> > disassembly) , where the purpose of the loop should be commented.

>

> >

>

> > Rgds,

>

> >

>

> > Martin

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> > [Non-text portions of this message have been removed]

>

> >

>

> >

>

>

>

>

>

>

>

>

>

>

>

> [Non-text portions of this message have been removed]

>

>

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Oops sad neews. After changing the value from
LDR=A0=A0=A0=A0 PC, [PC, #-0x0FF0]=A0=A0=A0=A0 /* Vector from VicVectAddr *=
/
to
LDR=A0=A0=A0=A0 PC, [PC, #-0x0120]=A0=A0=A0=A0 /* Vector from VicVectAddr *=
/
I got it working in my simulater. but it aint working with my hardware.

Raj

--- On Tue, 10/28/08, Ray Molenkamp wrote:
From: Ray Molenkamp
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with l=
pc2468
To: l...@yahoogroups.com
Date: Tuesday, October 28, 2008, 6:12 PM

=20=20=20=20
Have you sorted out your startup code issues and compensated

that vicvectaddr is at a different address for the 24xx ?

--Ray

Cool Dude wrote:

>

> Hello Ray,Martin,

> I tried using interrupt to blink an LED using a timer but the=20

> interrupt service routine is not getting serviced. The code is working=20

> perfectly with Keil arm compiler.

> So it has to work perfectly if the startup for interrupt is configured=20

> correctly. Can you help me by giving some checklist that i 've to=20

> check in the startup code to get the interrupt serviced.

> As of now immediately after after the interrupt is generated(due to=20

> timer) the control goes to the begining to the begining of startup=20

> code i think because i can see the PLLFEED all getting executed. Why=20

> is that.

>

> Raj

>

> --- On Mon, 10/27/08, Ray Molenkamp
> > wrote:

> From: Ray Molenkamp
> >

> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not=20

> with lpc2468

> To: lpc2000@yahoogroups .com

> Date: Monday, October 27, 2008, 8:03 PM

>

> You cannot use the header files you are using for the 214x for the 24xx

>

> although

>

> most registers have the same name they are sometimes located at a

>

> different address.

>

> NXP has a bundle of sample code for the 23xx/24xx i suggest you download

>

> that

>

> from their site and work from there.

>

> --Ray

>

> Cool Dude wrote:

>

> >

>

> > hello Martin,

>

> > You were rite. I was able to rectify the problem. (R0_0x08) pointed to

>

> > PLLSTAT register. It was supposed to point to the PLLLOCK bit which

>

> > would get set after the PLL gets stable. In LPC214x PLLLOCK bit is

>

> > the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and

>

> > it started working on the simulater. Thanks for that. But now the

>

> > problem is that i cannot get it working in my board. Guess there are

>

> > some more configurations to be made.

>

> > Raj

>

> >

>

> > --- On Mon, 10/27/08, mjames_doveridge
>

> > > wrote:

>

> > From: mjames_doveridge
> 40tuthill. com>>

>

> > Subject: [lpc2000] Re: Startup code working with lpc214x and not with

>

> > lpc2468

>

> > To: lpc2000@yahoogroups .com

>

> > Date: Monday, October 27, 2008, 1:36 PM

>

> >

>

> > >

>

> >

>

> > > Read the above again. Then get the register values, esp. R0. Compare

>

> >

>

> > > the R0 value against the register map of both processors in the user

>

> >

>

> > > manuals. You might want to start with the section on the PLL.

>

> >

>

> > >

>

> >

>

> > Oh, and look at your startup code *source listing*, (not the

>

> >

>

> > disassembly) , where the purpose of the loop should be commented.

>

> >

>

> > Rgds,

>

> >

>

> > Martin

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> >

>

> > [Non-text portions of this message have been removed]

>

> >

>

> >

>

>

>

>

>

>

>

>

>

>

>

> [Non-text portions of this message have been removed]

>

>=20=20
=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

That should be -#0x120

--jc

On Tue, Oct 28, 2008 at 10:27 AM, Cool Dude wrote:
> Oops sad neews. After changing the value from
> LDR PC, [PC, #-0x0FF0] /* Vector from VicVectAddr */
> to
> LDR PC, [PC, #-0x0120] /* Vector from VicVectAddr */
> I got it working in my simulater. but it aint working with my hardware.
>
> Raj
>
> --- On Tue, 10/28/08, Ray Molenkamp wrote:
> From: Ray Molenkamp
> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with
> lpc2468
> To: l...@yahoogroups.com
> Date: Tuesday, October 28, 2008, 6:12 PM
>
> Have you sorted out your startup code issues and compensated
>
> that vicvectaddr is at a different address for the 24xx ?
>
> --Ray
>
> Cool Dude wrote:
>
>>> Hello Ray,Martin,
>
>> I tried using interrupt to blink an LED using a timer but the
>
>> interrupt service routine is not getting serviced. The code is working
>
>> perfectly with Keil arm compiler.
>
>> So it has to work perfectly if the startup for interrupt is configured
>
>> correctly. Can you help me by giving some checklist that i 've to
>
>> check in the startup code to get the interrupt serviced.
>
>> As of now immediately after after the interrupt is generated(due to
>
>> timer) the control goes to the begining to the begining of startup
>
>> code i think because i can see the PLLFEED all getting executed. Why
>
>> is that.
>
>>> Raj
>
>>> --- On Mon, 10/27/08, Ray Molenkamp >
>> > wrote:
>
>> From: Ray Molenkamp >
>> >> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not
>
>> with lpc2468
>
>> To: lpc2000@yahoogroups .com > Date: Monday, October 27, 2008, 8:03 PM
>
>>> You cannot use the header files you are using for the 214x for the 24xx
>
>>> although
>
>>> most registers have the same name they are sometimes located at a
>
>>> different address.
>
>>> NXP has a bundle of sample code for the 23xx/24xx i suggest you download
>
>>> that
>
>>> from their site and work from there.
>
>>> --Ray
>
>>> Cool Dude wrote:
>
>>> >>> > hello Martin,
>
>>> > You were rite. I was able to rectify the problem. (R0_0x08) pointed to
>
>>> > PLLSTAT register. It was supposed to point to the PLLLOCK bit which
>
>>> > would get set after the PLL gets stable. In LPC214x PLLLOCK bit is
>
>>> > the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and
>
>>> > it started working on the simulater. Thanks for that. But now the
>
>>> > problem is that i cannot get it working in my board. Guess there are
>
>>> > some more configurations to be made.
>
>>> > Raj
>
>>> >>> > --- On Mon, 10/27/08, mjames_doveridge >
>>> > > wrote:
>
>>> > From: mjames_doveridge >
>> 40tuthill. com>>>> > Subject: [lpc2000] Re: Startup code working with lpc214x and not with
>
>>> > lpc2468
>
>>> > To: lpc2000@yahoogroups .com >> > Date: Monday, October 27, 2008, 1:36 PM
>
>>> >>> > >>> >>> > > Read the above again. Then get the register values, esp. R0. Compare
>
>>> >>> > > the R0 value against the register map of both processors in the user
>
>>> >>> > > manuals. You might want to start with the section on the PLL.
>
>>> >>> > >>> >>> > Oh, and look at your startup code *source listing*, (not the
>
>>> >>> > disassembly) , where the purpose of the loop should be commented.
>
>>> >>> > Rgds,
>
>>> >>> > Martin
>
>>> >>> >>> >>> >>> >>> >>> >>> >>> >>> >>> >>> > [Non-text portions of this message have been removed]
>
>>> >>> >>>>>>>>>>>>> [Non-text portions of this message have been removed]
>
>>> [Non-text portions of this message have been removed]

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Dear Jc,
THats exactly what i did. But its working witht he simulator on the PC. But in it is not working with the hardware.

Raj

--- On Tue, 10/28/08, J.C. Wren wrote:
From: J.C. Wren
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with lpc2468
To: l...@yahoogroups.com
Date: Tuesday, October 28, 2008, 8:16 PM

That should be -#0x120

--jc

On Tue, Oct 28, 2008 at 10:27 AM, Cool Dude wrote:

> Oops sad neews. After changing the value from

> LDR PC, [PC, #-0x0FF0] /* Vector from VicVectAddr */

> to

> LDR PC, [PC, #-0x0120] /* Vector from VicVectAddr */

> I got it working in my simulater. but it aint working with my hardware.

>

> Raj

>

> --- On Tue, 10/28/08, Ray Molenkamp wrote:

> From: Ray Molenkamp

> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with

> lpc2468

> To: lpc2000@yahoogroups .com

> Date: Tuesday, October 28, 2008, 6:12 PM

>

> Have you sorted out your startup code issues and compensated

>

> that vicvectaddr is at a different address for the 24xx ?

>

> --Ray

>

> Cool Dude wrote:

>

>>

>

>> Hello Ray,Martin,

>

>> I tried using interrupt to blink an LED using a timer but the

>

>> interrupt service routine is not getting serviced. The code is working

>

>> perfectly with Keil arm compiler.

>

>> So it has to work perfectly if the startup for interrupt is configured

>

>> correctly. Can you help me by giving some checklist that i 've to

>

>> check in the startup code to get the interrupt serviced.

>

>> As of now immediately after after the interrupt is generated(due to

>

>> timer) the control goes to the begining to the begining of startup

>

>> code i think because i can see the PLLFEED all getting executed. Why

>

>> is that.

>

>>

>

>> Raj

>

>>

>

>> --- On Mon, 10/27/08, Ray Molenkamp
>

>> > wrote:

>

>> From: Ray Molenkamp
>

>> >

>

>> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not

>

>> with lpc2468

>

>> To: lpc2000@yahoogroups .com

>

>> Date: Monday, October 27, 2008, 8:03 PM

>

>>

>

>> You cannot use the header files you are using for the 214x for the 24xx

>

>>

>

>> although

>

>>

>

>> most registers have the same name they are sometimes located at a

>

>>

>

>> different address.

>

>>

>

>> NXP has a bundle of sample code for the 23xx/24xx i suggest you download

>

>>

>

>> that

>

>>

>

>> from their site and work from there.

>

>>

>

>> --Ray

>

>>

>

>> Cool Dude wrote:

>

>>

>

>> >

>

>>

>

>> > hello Martin,

>

>>

>

>> > You were rite. I was able to rectify the problem. (R0_0x08) pointed to

>

>>

>

>> > PLLSTAT register. It was supposed to point to the PLLLOCK bit which

>

>>

>

>> > would get set after the PLL gets stable. In LPC214x PLLLOCK bit is

>

>>

>

>> > the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and

>

>>

>

>> > it started working on the simulater. Thanks for that. But now the

>

>>

>

>> > problem is that i cannot get it working in my board. Guess there are

>

>>

>

>> > some more configurations to be made.

>

>>

>

>> > Raj

>

>>

>

>> >

>

>>

>

>> > --- On Mon, 10/27/08, mjames_doveridge
>

>>

>

>> > > wrote:

>

>>

>

>> > From: mjames_doveridge
>

>> 40tuthill. com>>

>

>>

>

>> > Subject: [lpc2000] Re: Startup code working with lpc214x and not with

>

>>

>

>> > lpc2468

>

>>

>

>> > To: lpc2000@yahoogroups .com

>

>>

>

>> > Date: Monday, October 27, 2008, 1:36 PM

>

>>

>

>> >

>

>>

>

>> > >

>

>>

>

>> >

>

>>

>

>> > > Read the above again. Then get the register values, esp. R0. Compare

>

>>

>

>> >

>

>>

>

>> > > the R0 value against the register map of both processors in the user

>

>>

>

>> >

>

>>

>

>> > > manuals. You might want to start with the section on the PLL.

>

>>

>

>> >

>

>>

>

>> > >

>

>>

>

>> >

>

>>

>

>> > Oh, and look at your startup code *source listing*, (not the

>

>>

>

>> >

>

>>

>

>> > disassembly) , where the purpose of the loop should be commented.

>

>>

>

>> >

>

>>

>

>> > Rgds,

>

>>

>

>> >

>

>>

>

>> > Martin

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>> > [Non-text portions of this message have been removed]

>

>>

>

>> >

>

>>

>

>> >

>

>>

>

>>

>

>>

>

>>

>

>>

>

>>

>

>>

>

>>

>

>>

>

>>

>

>>

>

>> [Non-text portions of this message have been removed]

>

>>

>

>>

>

>

>

>

>

>

>

>

>

>

>

> [Non-text portions of this message have been removed]

>

>

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

What is the simulator simulating? the 23/24xx series use the
PL192 VIC while the older series use the PL190 vic.
--Ray

Cool Dude wrote:
>
> Dear Jc,
> THats exactly what i did. But its working witht he simulator on the
> PC. But in it is not working with the hardware.
>
> Raj
>
> --- On Tue, 10/28/08, J.C. Wren > > wrote:
> From: J.C. Wren >
> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not
> with lpc2468
> To: l...@yahoogroups.com
> Date: Tuesday, October 28, 2008, 8:16 PM
>
> That should be -#0x120
>
> --jc
>
> On Tue, Oct 28, 2008 at 10:27 AM, Cool Dude
> wrote:
>
> > Oops sad neews. After changing the value from
>
> > LDR PC, [PC, #-0x0FF0] /* Vector from VicVectAddr */
>
> > to
>
> > LDR PC, [PC, #-0x0120] /* Vector from VicVectAddr */
>
> > I got it working in my simulater. but it aint working with my hardware.
>
> > > Raj
>
> > > --- On Tue, 10/28/08, Ray Molenkamp > . org> wrote:
>
> > From: Ray Molenkamp .
> org> > Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not
> with
>
> > lpc2468
>
> > To: lpc2000@yahoogroups .com
>
> > Date: Tuesday, October 28, 2008, 6:12 PM
>
> > > Have you sorted out your startup code issues and compensated
>
> > > that vicvectaddr is at a different address for the 24xx ?
>
> > > --Ray
>
> > > Cool Dude wrote:
>
> > >> > >> Hello Ray,Martin,
>
> > >> I tried using interrupt to blink an LED using a timer but the
>
> > >> interrupt service routine is not getting serviced. The code is working
>
> > >> perfectly with Keil arm compiler.
>
> > >> So it has to work perfectly if the startup for interrupt is configured
>
> > >> correctly. Can you help me by giving some checklist that i 've to
>
> > >> check in the startup code to get the interrupt serviced.
>
> > >> As of now immediately after after the interrupt is generated(due to
>
> > >> timer) the control goes to the begining to the begining of startup
>
> > >> code i think because i can see the PLLFEED all getting executed. Why
>
> > >> is that.
>
> > >> > >> Raj
>
> > >> > >> --- On Mon, 10/27/08, Ray Molenkamp > . org
>
> > >> > wrote:
>
> > >> From: Ray Molenkamp > . org
>
> > >> > > >> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not
>
> > >> with lpc2468
>
> > >> To: lpc2000@yahoogroups .com > >> Date: Monday, October 27, 2008, 8:03 PM
>
> > >> > >> You cannot use the header files you are using for the 214x for the 24xx
>
> > >> > >> although
>
> > >> > >> most registers have the same name they are sometimes located at a
>
> > >> > >> different address.
>
> > >> > >> NXP has a bundle of sample code for the 23xx/24xx i suggest you
> download
>
> > >> > >> that
>
> > >> > >> from their site and work from there.
>
> > >> > >> --Ray
>
> > >> > >> Cool Dude wrote:
>
> > >> > >> > > >> > >> > hello Martin,
>
> > >> > >> > You were rite. I was able to rectify the problem. (R0_0x08)
> pointed to
>
> > >> > >> > PLLSTAT register. It was supposed to point to the PLLLOCK bit which
>
> > >> > >> > would get set after the PLL gets stable. In LPC214x PLLLOCK bit is
>
> > >> > >> > the 10bit but in LPC2468 is the 26th bit. Did changes accordingly and
>
> > >> > >> > it started working on the simulater. Thanks for that. But now the
>
> > >> > >> > problem is that i cannot get it working in my board. Guess there are
>
> > >> > >> > some more configurations to be made.
>
> > >> > >> > Raj
>
> > >> > >> > > >> > >> > --- On Mon, 10/27/08, mjames_doveridge >
> > >> > >> > > wrote:
>
> > >> > >> > From: mjames_doveridge >
> > >> 40tuthill. com>> > >> > >> > Subject: [lpc2000] Re: Startup code working with lpc214x and not with
>
> > >> > >> > lpc2468
>
> > >> > >> > To: lpc2000@yahoogroups .com > >> > >> > Date: Monday, October 27, 2008, 1:36 PM
>
> > >> > >> > > >> > >> > > > >> > >> > > >> > >> > > Read the above again. Then get the register values, esp. R0.
> Compare
>
> > >> > >> > > >> > >> > > the R0 value against the register map of both processors in the
> user
>
> > >> > >> > > >> > >> > > manuals. You might want to start with the section on the PLL.
>
> > >> > >> > > >> > >> > > > >> > >> > > >> > >> > Oh, and look at your startup code *source listing*, (not the
>
> > >> > >> > > >> > >> > disassembly) , where the purpose of the loop should be commented.
>
> > >> > >> > > >> > >> > Rgds,
>
> > >> > >> > > >> > >> > Martin
>
> > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > > >> > >> > [Non-text portions of this message have been removed]
>
> > >> > >> > > >> > >> > > >> > >> > >> > >> > >> > >> > >> > >> > >> > >> > >> > >> [Non-text portions of this message have been removed]
>
> > >> > >> > > > > > > > > > > > > [Non-text portions of this message have been removed]
>
> > > [Non-text portions of this message have been removed]
>
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Hi,

> Dear Jc,
> THats exactly what i did. But its working witht he simulator on the PC.
But in
> it is not working with the hardware.

Please raise a bug report with NXP stating their hardware is deficient so
they can add it to their errata.

(Why does anybody think that they can accurately develop and debug code on a
simulator? I have no idea. I have never, ever thought it appropriate to
develop peripheral-heavy code on a simulator. Make no sense to me at all.)

--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
CrossWorks for ARM, MSP430, AVR, MAXQ, and now Cortex-M3 processors

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Paul

> (Why does anybody think that they can accurately develop and debug code o=
n a
> simulator? I have no idea. I have never, ever thought it appropriate to
> develop peripheral-heavy code on a simulator. Make no sense to me at all=
.)

Depends how good the simulator is. Look at VirtuTech. But that=C2=B4s a=20
different league :-)
--=20
42Bastian

Note: SPAM-only account, direct mail to bs42@...
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

dear Ray,
What is the simulator simulating? the 23/24xx series use the

PL192 VIC while the older series use the PL190 vic.

In the simulator its observed that immediately after the timer is over flow=
n the control jumps to the ISR.and i looked through the doc(PL192) u mentio=
ned. But from that day i could only find out that i've to change the value =
from 0x0FF0 to 0x0120. Is there anything else that i 've to change.

Raj

--- On Wed, 10/29/08, 42Bastian wrote:
From: 42Bastian
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with l=
pc2468
To: l...@yahoogroups.com
Date: Wednesday, October 29, 2008, 2:26 PM

=20=20=20=20
Paul

> (Why does anybody think that they can accurately develop and debug code o=
n a

> simulator? I have no idea. I have never, ever thought it appropriate to

> develop peripheral-heavy code on a simulator. Make no sense to me at all=
.)

Depends how good the simulator is. Look at VirtuTech. But that=B4s a=20

different league :-)

--=20

42Bastian

Note: SPAM-only account, direct mail to bs42@...

=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

dear paul,
I wouldnt say simulator would be reliable.=A0 I could rely on it only to an=
extent because the time timings is alwys different from the real time.=20

Raj

--- On Wed, 10/29/08, 42Bastian wrote:
From: 42Bastian
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with l=
pc2468
To: l...@yahoogroups.com
Date: Wednesday, October 29, 2008, 2:26 PM

=20=20=20=20
Paul

> (Why does anybody think that they can accurately develop and debug code o=
n a

> simulator? I have no idea. I have never, ever thought it appropriate to

> develop peripheral-heavy code on a simulator. Make no sense to me at all=
.)

Depends how good the simulator is. Look at VirtuTech. But that=B4s a=20

different league :-)

--=20

42Bastian

Note: SPAM-only account, direct mail to bs42@...

=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

How about you read the lpc24xx users guide and find out?

--Ray

Cool Dude wrote:
>
> dear Ray,
> What is the simulator simulating? the 23/24xx series use the
>
> PL192 VIC while the older series use the PL190 vic.
>
> In the simulator its observed that immediately after the timer is over
> flown the control jumps to the ISR.and i looked through the doc(PL192)
> u mentioned. But from that day i could only find out that i've to
> change the value from 0x0FF0 to 0x0120. Is there anything else that i
> 've to change.
>
> Raj
>
> --- On Wed, 10/29/08, 42Bastian > > wrote:
> From: 42Bastian > >
> Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not
> with lpc2468
> To: l...@yahoogroups.com
> Date: Wednesday, October 29, 2008, 2:26 PM
>
> Paul
>
> > (Why does anybody think that they can accurately develop and debug
> code on a
>
> > simulator? I have no idea. I have never, ever thought it appropriate to
>
> > develop peripheral-heavy code on a simulator. Make no sense to me at
> all.)
>
> Depends how good the simulator is. Look at VirtuTech. But that´s a
>
> different league :-)
>
> --
>
> 42Bastian
>
> Note: SPAM-only account, direct mail to bs42@...
>
> [Non-text portions of this message have been removed]
>
>

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Well, for what it's worth, I started with my LPC2148 demo code base,
and had it running on a LPC2468 in about an hour. You're welcome to
a copy of the start-up file, but since it's an actual customer
application, I can't give you a complete working code-base. I didn't
need a simulator or JTAG, just Flash Magic.

--jc

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Dear JC,
thanks. Can you please send me the startup code for LPC2468. I hope its for the GNU compiler.

Raj

--- On Wed, 10/29/08, J.C. Wren wrote:
From: J.C. Wren
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with lpc2468
To: l...@yahoogroups.com
Date: Wednesday, October 29, 2008, 6:40 PM

Well, for what it's worth, I started with my LPC2148 demo code base,

and had it running on a LPC2468 in about an hour. You're welcome to

a copy of the start-up file, but since it's an actual customer

application, I can't give you a complete working code-base. I didn't

need a simulator or JTAG, just Flash Magic.

--jc

[Non-text portions of this message have been removed]
------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Please see http://jcwren.com/lpc2468 I've also included the cpu
initialization code and the lpc2468.h header file I use.

And yes, it's for GCC.

--jc

------------------------------------



(You need to be a member of lpc2000 -- send a blank email to lpc2000-subscribe@yahoogroups.com )

Dear JC,
hey I went crazy over that code u send me. It was a bit tough for me to und=
erstand. Can you check if any problem is there with=A0 my startup.S. I 've =
attached my file. Thankyou.

Raj

--- On Wed, 10/29/08, J.C. Wren wrote:
From: J.C. Wren
Subject: Re: [lpc2000] Re: Startup code working with lpc214x and not with l=
pc2468
To: l...@yahoogroups.com
Date: Wednesday, October 29, 2008, 7:15 PM

=20=20=20=20
Please see http://jcwren. com/lpc2468 I've also included the c=
pu

initialization code and the lpc2468.h header file I use.

And yes, it's for GCC.

--jc
=20=20=20=20=20=20

=20=20=20=20
=20=20=20=20
=09
=09=20
=09
=09

=09
=09
=09
=20=20=20=20=20=20
----------

#/***********************************************************************/=
=0D
#/* This file is part of the uVision/ARM development tools */=
=0D
#/* Copyright KEIL ELEKTRONIK GmbH 2002-2004 */=
=0D
#/***********************************************************************/=
=0D
#/* */=
=0D
#/* STARTUP.S: GNU Startup file for LPC2468 =
*/=0D
#/* */=
=0D
#/***********************************************************************/=
=0D
=0D
=0D
/* =0D
//*** <<< Use Configuration Wizard in Context Menu >>> *** =0D
*/=0D
=0D
=0D
# *** Startup Code (executed after Reset) ***=0D
=0D
=0D
# Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs=0D
=0D
.equ Mode_USR, 0x10=0D
.equ Mode_FIQ, 0x11=0D
.equ Mode_IRQ, 0x12=0D
.equ Mode_SVC, 0x13=0D
.equ Mode_ABT, 0x17=0D
.equ Mode_UND, 0x1B=0D
.equ Mode_SYS, 0x1F=0D
=0D
.equ I_Bit, 0x80 /* when I bit is set, IRQ is disabl=
ed */=0D
.equ F_Bit, 0x40 /* when F bit is set, FIQ is disabl=
ed */=0D
=0D
=0D
/*=0D
// Stack Configuration=0D
// Top of Stack Address <0x0-0xFFFFFFFF:4>=0D
// Stack Sizes (in Bytes)=0D
// Undefined Mode <0x0-0xFFFFFFFF:4>=0D
// Supervisor Mode <0x0-0xFFFFFFFF:4>=0D
// Abort Mode <0x0-0xFFFFFFFF:4>=0D
// Fast Interrupt Mode <0x0-0xFFFFFFFF:4>=0D
// Interrupt Mode <0x0-0xFFFFFFFF:4>=0D
// User/System Mode <0x0-0xFFFFFFFF:4>=0D
// =0D
// =0D
*/=0D
.equ Top_Stack, 0x40004000=0D
.equ UND_Stack_Size, 0x00000004=0D
.equ SVC_Stack_Size, 0x00000004=0D
.equ ABT_Stack_Size, 0x00000004=0D
.equ FIQ_Stack_Size, 0x00000004=0D
.equ IRQ_Stack_Size, 0x00000080=0D
.equ USR_Stack_Size, 0x00000400=0D
=0D
=0D
# VPBDIV definitions=0D
.equ VPBDIV, 0xE01FC100 /* VPBDIV Address */=0D
=0D
/*=0D
// VPBDIV Setup=0D
// Peripheral Bus Clock Rate=0D
// VPBDIV: VPB Clock=0D
// <0=3D> VPB Clock =3D CPU Clock / 4=0D
// <1=3D> VPB Clock =3D CPU Clock=0D
// <2=3D> VPB Clock =3D CPU Clock / 2=0D
// XCLKDIV: XCLK Pin=0D
// <0=3D> XCLK Pin =3D CPU Clock / 4=0D
// <1=3D> XCLK Pin =3D CPU Clock=0D
// <2=3D> XCLK Pin =3D CPU Clock / 2=0D
// =0D
*/=0D
.equ VPBDIV_SETUP, 0 /*since 0 VPBDIV_SETUP is not servi=
sed*******/=0D
.equ VPBDIV_Val, 0x00000000=0D
=0D
=0D
# Phase Locked Loop (PLL) definitions=0D
.equ PLL_BASE, 0xE01FC080 /* PLL Base Address */=0D
.equ PLLCON_OFS, 0x00 /* PLL Control Offset*/=0D
.equ PLLCFG_OFS, 0x04 /* PLL Configuration Offset */=
=0D
.equ PLLSTAT_OFS, 0x08 /* PLL Status Offset */=0D
.equ PLLFEED_OFS, 0x0C /* PLL Feed Offset */=0D
=0D
.equ CCLKCFG_OFS, 0x84 /* CPU Clock Divider Reg Offset*/=0D
.equ USBCLKCFG_OFS, 0x88 /* USB Clock Divider Reg Offset*/=0D
.equ CLKSRCSEL_OFS, 0x8C /* Clock Source Select Reg Offset*/=0D
.equ SCS_OFS, 0x120 /* System Control and Status Reg Offset=
*/=0D
.equ PCLKSEL0_OFS, 0x128 /* Peripheral Clock Select Reg 0 Offset=
*/=0D
.equ PCLKSEL1_OFS, 0x12C /* Peripheral Clock Select Reg 1 Offset=
*/=0D
=0D
#CONSTANT=0D
.equ OSCRANGE, (1<<4) /* Oscillator Range Select*/=0D
.equ OSCEN, (1<<5) /* Main oscillator Enable*/=0D
.equ OSCSTAT, (1<<6) /* Main Oscillator Status*/=0D
=0D
.equ PLLCON_PLLE, (1<<0) /* PLL Enable */=0D
.equ PLLCON_PLLC, (1<<1) /* PLL Connect */=0D
.equ PLLCFG_MSEL, (0x3FFF<<0) /* PLL Multiplier */=0D
.equ PLLCFG_PSEL, (0x03<<5) /* PLL Divider */=0D
.equ PLLSTAT_PLOCK, (1<<26) /* PLL Lock Status */=0D
=0D
/*=0D
// PLL Setup=0D
// MSEL: PLL Multiplier Selection=0D
// <1-32><#-1>=0D
// M Value=0D
// PSEL: PLL Divider Selection=0D
// <0=3D> 1 <1=3D> 2 <2=3D> 4 <3=3D> 8=0D
// P Value=0D
// =0D
*/=0D
.equ PLL_SETUP, 1=0D
.equ PLLCFG_Val, 0x0000000b=0D
=0D
.equ SCS_Val, 0x00000020=0D
.equ CLKSRCSEL_Val, 0x00000001=0D
.equ CCLKCFG_Val, 0x00000004=0D
.equ USBCLKCFG_Val, 0x00000005=0D
.equ PCLKSEL0_Val, 0x00000000=0D
.equ PCLKSEL1_Val, 0x00000000=0D
=0D
=0D
# Memory Accelerator Module (MAM) definitions=0D
.equ MAM_BASE, 0xE01FC000 /* MAM Base Address */=0D
.equ MAMCR_OFS, 0x00 /* MAM Control Offset*/=0D
.equ MAMTIM_OFS, 0x04 /* MAM Timing Offset */=0D
=0D
/*=0D
// MAM Setup=0D
// MAM Control=0D
// <0=3D> Disabled=0D
// <1=3D> Partially Enabled=0D
// <2=3D> Fully Enabled=0D
// Mode=0D
// MAM Timing=0D
// <0=3D> Reserved <1=3D> 1 <2=3D> 2 <3=3D> 3=0D
// <4=3D> 4 <5=3D> 5 <6=3D> 6 <7=3D> 7=0D
// Fetch Cycles=0D
// =0D
*/=0D
.equ MAM_SETUP, 1=0D
.equ MAMCR_Val, 0x00000002=0D
.equ MAMTIM_Val, 0x00000004=0D
=0D
=0D
# External Memory Controller (EMC) definitions=0D
.equ EMC_BASE, 0xFFE00000 /* EMC Base Address */=0D
.equ BCFG0_OFS, 0x00 /* BCFG0 Offset */=0D
.equ BCFG1_OFS, 0x04 /* BCFG1 Offset */=0D
.equ BCFG2_OFS, 0x08 /* BCFG2 Offset */=0D
.equ BCFG3_OFS, 0x0C /* BCFG3 Offset */=0D
=0D
/*=0D
// External Memory Controller (EMC)=0D
*/=0D
.equ EMC_SETUP, 0=0D
=0D
/*=0D
// Bank Configuration 0 (BCFG0)=0D
// IDCY: Idle Cycles <0-15>=0D
// WST1: Wait States 1 <0-31>=0D
// WST2: Wait States 2 <0-31>=0D
// RBLE: Read Byte Lane Enable=0D
// WP: Write Protect=0D
// BM: Burst ROM=0D
// MW: Memory Width <0=3D> 8-bit <1=3D> 16-bit=0D
// <2=3D> 32-bit <3=3D> Reserved=0D
// =0D
*/=0D
.equ BCFG0_SETUP, 0=0D
.equ BCFG0_Val, 0x0000FBEF=0D
=0D
/*=0D
// Bank Configuration 1 (BCFG1)=0D
// IDCY: Idle Cycles <0-15>=0D
// WST1: Wait States 1 <0-31>=0D
// WST2: Wait States 2 <0-31>=0D
// RBLE: Read Byte Lane Enable=0D
// WP: Write Protect=0D
// BM: Burst ROM=0D
// MW: Memory Width <0=3D> 8-bit <1=3D> 16-bit=0D
// <2=3D> 32-bit <3=3D> Reserved=0D
// =0D
*/=0D
.equ BCFG1_SETUP, 0=0D
.equ BCFG1_Val, 0x0000FBEF=0D
=0D
/*=0D
// Bank Configuration 2 (BCFG2)=0D
// IDCY: Idle Cycles <0-15>=0D
// WST1: Wait States 1 <0-31>=0D
// WST2: Wait States 2 <0-31>=0D
// RBLE: Read Byte Lane Enable=0D
// WP: Write Protect=0D
// BM: Burst ROM=0D
// MW: Memory Width <0=3D> 8-bit <1=3D> 16-bit=0D
// <2=3D> 32-bit <3=3D> Reserved=0D
// =0D
*/=0D
.equ BCFG2_SETUP, 0=0D
.equ BCFG2_Val, 0x0000FBEF=0D
=0D
/*=0D
// Bank Configuration 3 (BCFG3)=0D
// IDCY: Idle Cycles <0-15>=0D
// WST1: Wait States 1 <0-31>=0D
// WST2: Wait States 2 <0-31>=0D
// RBLE: Read Byte Lane Enable=0D
// WP: Write Protect=0D
// BM: Burst ROM=0D
// MW: Memory Width <0=3D> 8-bit <1=3D> 16-bit=0D
// <2=3D> 32-bit <3=3D> Reserved=0D
// =0D
*/=0D
.equ BCFG3_SETUP, 0=0D
.equ BCFG3_Val, 0x0000FBEF=0D
=0D
/*=0D
// End of EMC=0D
*/=0D
=0D
=0D
# External Memory Pins definitions=0D
; .equ PINSEL2, 0xE002C014 /* PINSEL2 Address */=0D
; .equ PINSEL2_Val, 0x0E6149E4 /* CS0..3, OE, WE, BLS0..3, =
=0D
D0..31, A2..23, JTAG Pins */=
=0D
=0D
=0D
# Starupt Code must be linked first at Address at which it expects to run.=
=0D
=0D
.text=0D
.arm=0D
=0D
.global _startup=0D
.func _startup=0D
_startup:=0D
=0D
=0D
# Exception Vectors=0D
# Mapped to Address 0.=0D
# Absolute addressing mode must be used.=0D
# Dummy Handlers are implemented as infinite loops which can be modified.=
=0D
=0D
Vectors: LDR PC, Reset_Addr =0D
LDR PC, Undef_Addr=0D
LDR PC, SWI_Addr=0D
LDR PC, PAbt_Addr=0D
LDR PC, DAbt_Addr=0D
NOP /* Reserved Vector */=0D
# LDR PC, IRQ_Addr=0D
LDR PC, [PC, #-0x0120] /* Vector from VicVectAddr *=
/=0D
LDR PC, FIQ_Addr=0D
=0D
Reset_Addr: .word Reset_Handler=0D
Undef_Addr: .word Undef_Handler=0D
SWI_Addr: .word SWI_Handler=0D
PAbt_Addr: .word PAbt_Handler=0D
DAbt_Addr: .word DAbt_Handler=0D
.word 0 /* Reserved Address */=0D
IRQ_Addr: .word IRQ_Handler=0D
FIQ_Addr: .word FIQ_Handler=0D
=0D
Undef_Handler: B Undef_Handler=0D
SWI_Handler: B SWI_Handler=0D
PAbt_Handler: B PAbt_Handler=0D
DAbt_Handler: B DAbt_Handler=0D
IRQ_Handler: B IRQ_Handler=0D
FIQ_Handler: B FIQ_Handler=0D
=0D
=0D
# Reset Handler=0D
=0D
Reset_Handler: =0D
=0D
=0D
.ifdef EXTERNAL_MODE=0D
LDR R0, =3DPINSEL2=0D
LDR R1, =3DPINSEL2_Val=0D
STR R1, [R0]=0D
.endif=0D
=0D
=0D
.if EMC_SETUP=0D
LDR R0, =3DEMC_BASE=0D
=0D
.if BCFG0_SETUP=0D
LDR R1, =3DBCFG0_Val=0D
STR R1, [R0, #BCFG0_OFS]=0D
.endif=0D
=0D
.if BCFG1_SETUP=0D
LDR R1, =3DBCFG1_Val=0D
STR R1, [R0, #BCFG1_OFS]=0D
.endif=0D
=0D
.if BCFG2_SETUP=0D
LDR R1, =3DBCFG2_Val=0D
STR R1, [R0, #BCFG2_OFS]=0D
.endif=0D
=0D
.if BCFG3_SETUP=0D
LDR R1, =3DBCFG3_Val=0D
STR R1, [R0, #BCFG3_OFS]=0D
.endif=0D
=0D
.endif=0D
=0D
=0D
.if VPBDIV_SETUP=0D
LDR R0, =3DVPBDIV=0D
LDR R1, =3DVPBDIV_Val=0D
STR R1, [R0]=0D
.endif=0D
=0D
=0D
.if PLL_SETUP=0D
LDR R0, =3DPLL_BASE=0D
MOV R1, #0xAA=0D
MOV R2, #0x55=0D
=0D
# Configure and Enable PLL=0D
MOV R3, #SCS_Val=0D
STR R3, [R0, #SCS_OFS] =0D
=0D
=0D
=0D
.if (SCS_Val & OSCEN) =0D
OSC_Loop: LDR R3, [R0, #SCS_OFS] /* Wait for main osc stabiliz=
e*/=0D
ANDS R3, R3, #OSCSTAT=0D
BEQ OSC_Loop=0D
.endif=0D
=0D
LDR R3, =3DCLKSRCSEL_Val /* Select PLL source clock*/=0D
STR R3, [R0, #CLKSRCSEL_OFS] /*select clock source**/=
=0D
LDR R3, =3DPLLCFG_Val=0D
STR R3, [R0, #PLLCFG_OFS] =0D
STR R1, [R0, #PLLFEED_OFS]=0D
STR R2, [R0, #PLLFEED_OFS]=0D
MOV R3, #PLLCON_PLLE=0D
STR R3, [R0, #PLLCON_OFS]=0D
STR R1, [R0, #PLLFEED_OFS]=0D
STR R2, [R0, #PLLFEED_OFS]=0D
=0D
=0D
# Wait until PLL Locked=0D
PLL_Loop: LDR R3, [R0, #PLLSTAT_OFS]=0D
ANDS R3, R3, #PLLSTAT_PLOCK=0D
BEQ PLL_Loop=0D
=0D
#check if needed=0D
;M_N_Lock: LDR R3, [R0, #PLLSTAT_OFS]=0D
/* LDR R4, =3D(PLLSTAT_M | PLLSTAT_N) */=0D
; AND R3, R3, R4=0D
; LDR R4, =3DPLLCFG_Val=0D
; EORS R3, R3, R4=0D
; BNE M_N_Lock=0D
=0D
=0D
# Setup CPU clock divider=0D
MOV R3, #CCLKCFG_Val=0D
STR R3, [R0, #CCLKCFG_OFS]=0D
=0D
# Setup USB clock divider=0D
LDR R3, =3DUSBCLKCFG_Val=0D
STR R3, [R0, #USBCLKCFG_OFS]=0D
=0D
# Setup Peripheral Clock=0D
LDR R3, =3DPCLKSEL0_Val=0D
STR R3, [R0, #PCLKSEL0_OFS]=0D
LDR R3, =3DPCLKSEL1_Val=0D
STR R3, [R0, #PCLKSEL1_OFS]=0D
=0D
=0D
# Switch to PLL Clock=0D
MOV R3, #(PLLCON_PLLE | PLLCON_PLLC)=0D
STR R3, [R0, #PLLCON_OFS]=0D
STR R1, [R0, #PLLFEED_OFS]=0D
STR R2, [R0, #PLLFEED_OFS]=0D
.endif=0D
=0D
=0D
.if MAM_SETUP=0D
LDR R0, =3DMAM_BASE=0D
MOV R1, #MAMTIM_Val=0D
STR R1, [R0, #MAMTIM_OFS] =0D
MOV R1, #MAMCR_Val=0D
STR R1, [R0, #MAMCR_OFS] =0D
.endif=0D
=0D
=0D
# Memory Mapping (when Interrupt Vectors are in RAM)=0D
.equ MEMMAP, 0xE01FC040 /* Memory Mapping Control */=0D
=0D
.ifdef RAM_INTVEC=0D
LDR R0, =3DMEMMAP=0D
MOV R1, #2=0D
STR R1, [R0]=0D
.endif=0D
=0D
=0D
# Initialise Interrupt System=0D
# ...=0D
=0D
=0D
# Setup Stack for each mode=0D
=0D
LDR R0, =3DTop_Stack=0D
=0D
# Enter Undefined Instruction Mode and set its Stack Pointer=0D
MSR CPSR_c, #Mode_UND|I_Bit|F_Bit=0D
MOV SP, R0=0D
SUB R0, R0, #UND_Stack_Size=0D
=0D
# Enter Abort Mode and set its Stack Pointer=0D
MSR CPSR_c, #Mode_ABT|I_Bit|F_Bit=0D
MOV SP, R0=0D
SUB R0, R0, #ABT_Stack_Size=0D
=0D
# Enter FIQ Mode and set its Stack Pointer=0D
MSR CPSR_c, #Mode_FIQ|I_Bit|F_Bit=0D
MOV SP, R0=0D
SUB R0, R0, #FIQ_Stack_Size=0D
=0D
# Enter IRQ Mode and set its Stack Pointer=0D
MSR CPSR_c, #Mode_IRQ|I_Bit|F_Bit=0D
MOV SP, R0=0D
SUB R0, R0, #IRQ_Stack_Size=0D
=0D
# Enter Supervisor Mode and set its Stack Pointer=0D
MSR CPSR_c, #Mode_SVC|I_Bit|F_Bit=0D
MOV SP, R0=0D
SUB R0, R0, #SVC_Stack_Size=0D
=0D
# Enter User Mode and set its Stack Pointer=0D
MSR CPSR_c, #Mode_USR=0D
MOV SP, R0=0D
=0D
# Setup a default Stack Limit (when compiled with "-mapcs-stack-check")=0D
SUB SL, SP, #USR_Stack_Size=0D
=0D
=0D
# Relocate .data section (Copy from ROM to RAM)=0D
LDR R1, =3D_etext=0D
LDR R2, =3D_data=0D
LDR R3, =3D_edata=0D
LoopRel: CMP R2, R3=0D
LDRLO R0, [R1], #4=0D
STRLO R0, [R2], #4=0D
BLO LoopRel=0D
=0D
=0D
# Clear .bss section (Zero init)=0D
MOV R0, #0=0D
LDR R1, =3D__bss_start__=0D
LDR R2, =3D__bss_end__=0D
LoopZI: CMP R1, R2=0D
STRLO R0, [R1], #4=0D
BLO LoopZI=0D
=0D
=0D
# Enter the C code=0D
B _start=0D
=0D
=0D
.size _startup, . - _startup=0D
.endfunc=0D
=0D
=0D
.end=0D
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