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Discussion Groups

Discussion Groups | LPC2000 | RE: [lpc2100] What Tha..?

Discussion group dedicated to the Philips LPC2000 family of ARM MCUs

Programming the flash memory through the JTAG port - russian_beagle - Jan 21 15:30:00 2004

Hi all!

Can I download my program into the FLASH memory using the JTAG
port? The CrossWorks utilize own loader from SRAM which program the
FLASH segment using IAP.

Thanks





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Re: [lpc2100] Programming the flash memory through the JTAG port - Leon Heller - Jan 21 15:42:00 2004


----- Original Message -----
From: "russian_beagle" <>
To: <>
Sent: Wednesday, January 21, 2004 8:30 PM
Subject: [lpc2100] Programming the flash memory through the JTAG port > Hi all!
>
> Can I download my program into the FLASH memory using the JTAG
> port? The CrossWorks utilize own loader from SRAM which program the
> FLASH segment using IAP.

If you have a Wiggler OCD Commander software from Macraigor can upload files
via JTAG.

Leon
--
Leon Heller, G1HSM
Email:
My low-cost Philips LPC210x ARM development system:
http://www.geocities.com/leon_heller/lpc2104.html





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RE: [lpc2100] Programming the flash memory through the JTAG port - Paul Curtis - Jan 21 16:21:00 2004

Leon,

> > Can I download my program into the FLASH memory using the
> JTAG port?
> > The CrossWorks utilize own loader from SRAM which program the FLASH
> > segment using IAP.
>
> If you have a Wiggler OCD Commander software from Macraigor
> can upload files via JTAG.

Does load load the LPC FLASH then, Leon?

-- Paul.





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Re: [lpc2100] Programming the flash memory through the JTAG port - Leon Heller - Jan 21 16:45:00 2004


----- Original Message -----
From: "Paul Curtis" <>
To: <>
Sent: Wednesday, January 21, 2004 9:21 PM
Subject: RE: [lpc2100] Programming the flash memory through the JTAG port > Leon,
>
> > > Can I download my program into the FLASH memory using the
> > JTAG port?
> > > The CrossWorks utilize own loader from SRAM which program the FLASH
> > > segment using IAP.
> >
> > If you have a Wiggler OCD Commander software from Macraigor
> > can upload files via JTAG.
>
> Does load load the LPC FLASH then, Leon?

I think what I said was wrong, it will only load into RAM.

Leon
--
Leon Heller, G1HSM
Email:
My low-cost Philips LPC210x ARM development system:
http://www.geocities.com/leon_heller/lpc2104.html





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RE: [lpc2100] Programming the flash memory through the JTAG port - Paul Curtis - Jan 21 19:56:00 2004


> -----Original Message-----
> From: russian_beagle [mailto:]
> Sent: 21 January 2004 20:30
> To:
> Subject: [lpc2100] Programming the flash memory through the JTAG port > Hi all!
>
> Can I download my program into the FLASH memory using the JTAG
> port? The CrossWorks utilize own loader from SRAM which program the
> FLASH segment using IAP.

I don't believe that Philips publish anything that tells you how to
program the flash on the LPC, other than by using the bootstrap loader
or by calling a set of routines in the rom yourself (which the BSL
itself uses). As such, it is impossible to program the flash (read:
nearly impossible) using pure JTAG. Certainly, I believe Philips can
change the flash controller or technology without changing the
programming interface, so even if you did reverse engineer the bootstrap
loader to figure out how to poke the flash controller, it's not
guaranteed that the flash controller remains static across revs of the
silicon, but the API will.

--
Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
CrossWorks for MSP430 and ARM processors






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Re: Programming the flash memory through the JTAG port - lpc2100_fan - Jan 22 15:40:00 2004

--- In , "Paul Curtis" <plc@r...> wrote:
>
> > -----Original Message-----
> > From: russian_beagle [mailto:russian_beagle@y...]
> > Sent: 21 January 2004 20:30
> > To:
> > Subject: [lpc2100] Programming the flash memory through the JTAG port
> >
> >
> > Hi all!
> >
> > Can I download my program into the FLASH memory using the JTAG
> > port? The CrossWorks utilize own loader from SRAM which program the
> > FLASH segment using IAP.
>
> I don't believe that Philips publish anything that tells you how to
> program the flash on the LPC, other than by using the bootstrap loader
> or by calling a set of routines in the rom yourself (which the BSL
> itself uses). As such, it is impossible to program the flash (read:
> nearly impossible) using pure JTAG. Certainly, I believe Philips can
> change the flash controller or technology without changing the
> programming interface, so even if you did reverse engineer the bootstrap
> loader to figure out how to poke the flash controller, it's not
> guaranteed that the flash controller remains static across revs of the
> silicon, but the API will.
>
> --
> Paul Curtis, Rowley Associates Ltd http://www.rowley.co.uk
> CrossWorks for MSP430 and ARM processors

It is "by definition" possible to program the device through JTAG.
However, Paul brought up the most important issue, compatibility over
a longer periode of time. If Philips does not publish the direct
programming sequence, they might have a good reason for it, one being
that changes can be made to the actual programming mechanism without
changing anything in the Programming Interface.

I would HIGHLY recommend to use the internal routines provided by the
bootloader for ease of use as much as for avoiding future trouble in
case the mechanism actually changes.

Being an embedded developer as well as involved with customer support
some times, I know that we all want to know HOW things work in detail
but sometimes it is time not well spent to dig into issues that can
only make live harder.

On a side note, I don't try to figure out the exact procedures used by
the BIOS of my PC if I program something in Visual C++ :-)

Cheers, Bob.




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Re: Programming the flash memory through the JTAG port - russian_beagle - Jan 23 3:31:00 2004

> It is "by definition" possible to program the device through JTAG.
> However, Paul brought up the most important issue, compatibility
over
> a longer periode of time. If Philips does not publish the direct
> programming sequence, they might have a good reason for it, one
being
> that changes can be made to the actual programming mechanism
without
> changing anything in the Programming Interface.
>
> I would HIGHLY recommend to use the internal routines provided by
the
> bootloader for ease of use as much as for avoiding future trouble
in
> case the mechanism actually changes.
>
> Being an embedded developer as well as involved with customer
support
> some times, I know that we all want to know HOW things work in
detail
> but sometimes it is time not well spent to dig into issues that can
> only make live harder.
>
> On a side note, I don't try to figure out the exact procedures
used by
> the BIOS of my PC if I program something in Visual C++ :-)
>
> Cheers, Bob. You right. But by chance I can erase the bootloader. I found in our
russian forum what one embedder erased the bootloader when he
downloaded a big file ( > 128 kB) to LPC21xx through the flash
bootloader. I don't know is it possible? But theoretically it is
possible :(

When I will have free time, I will disassemble the Philips
bootloader. Maybe I will find a technique of working with flash
memory without IAP.

BR, Konstantin.





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What Tha..? - James Dabbs - Jan 23 15:37:00 2004

What Tha..?

Why is GNU 3.3.2 generating this code?  Am I reading this wrong, or am I using the wrong compiler??

Thanks for any insight! 

void Test(unsigned long Base)
{
        register volatile U8 * TestP = (volatile U8 *)(Base + 0x5555);
60000134: E3A01101      MOV      R1,#0x40000000
6000013C: E2802055      ADD      R2,R0,#0x55
6000015C: E2801C55      ADD      R1,R0,#0x5500
60000160: E2810055      ADD      R0,R1,#0x55
        while (1)
60000140: E3A01004      MOV      R1,#0x4
60000164: E3A02004      MOV      R2,#0x4
        {
                *TestP = 4;
60000144: E5C21000      STRB     R1,[R2,#0x0]
60000168: E5C02000      STRB     R2,[R0,#0x0]   <<-- What is THIS??
                *TestP = (*TestP) + 1;
60000148: E5D2C000      LDRB     R12,[R2,#0x0]
6000016C: E5D0C000      LDRB     R12,[R0,#0x0]
60000170: E28C1001      ADD      R1,R12,#0x1
60000174: E5C01000      STRB     R1,[R0,#0x0]
60000178: EAFFFFFA      B        0x60000168
6000017C: 00            **** Invalid Instruction ****
        }






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Re: [lpc2100] What Tha..? - Lewin A.R.W. Edwards - Jan 23 16:00:00 2004

> void Test(unsigned long Base)
> {
> register volatile U8 * TestP = (volatile U8 *)(Base + 0x5555);

That is quite interesting. What happens if you remove the "register"
keyword? In theory, it should never be necessary - the compiler should
be slick enough to work out when it's more efficient to use a register
variable.

Also, I wonder if tinkering with the optimization level might change the
object code you get here.

--
-- Lewin A.R.W. Edwards (http://www.zws.com/)
Learn how to develop high-end embedded systems on a tight budget!
http://www.amazon.com/exec/obidos/ASIN/0750676094/zws-20



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Re: [lpc2100] What Tha..? - Bogdan Marinescu - Jan 23 16:20:00 2004

   Does this actually happen ?! This is a complete disaster !! I'm more worried about the line above the one you mentioned, which always tries to write a 4 at address 4 (?!) I just tried the code in 3.1 and it generates clean code with -O4. What's your opt level? I need a cold beer after this.

--- James Dabbs <j...@tga.com> wrote:
> Why is GNU 3.3.2 generating this code? Am I reading
> this wrong, or am I
> using the wrong compiler??
>
> Thanks for any insight!
>
> void Test(unsigned long Base)
> {
> register volatile U8 * TestP = (volatile U8 *)(Base
> + 0x5555);
> 60000134: E3A01101 MOV R1,#0x40000000
> 6000013C: E2802055 ADD R2,R0,#0x55
> 6000015C: E2801C55 ADD R1,R0,#0x5500
> 60000160: E2810055 ADD R0,R1,#0x55
> while (1)
> 60000140: E3A01004 MOV R1,#0x4
> 60000164: E3A02004 MOV R2,#0x4
> {
> *TestP = 4;
> 60000144: E5C21000 STRB R1,[R2,#0x0]
> 60000168: E5C02000 STRB R2,[R0,#0x0] <<--
> What is THIS??
> *TestP = (*TestP) + 1;
> 60000148: E5D2C000 LDRB R12,[R2,#0x0]
> 6000016C: E5D0C000 LDRB R12,[R0,#0x0]
> 60000170: E28C1001 ADD R1,R12,#0x1
> 60000174: E5C01000 STRB R1,[R0,#0x0]
> 60000178: EAFFFFFA B 0x60000168
> 6000017C: 00 **** Invalid Instruction
> ****
> }
>




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Re: [lpc2100] What Tha..? - Robert Adsett - Jan 23 16:25:00 2004

Hmm, I wrote some interleaving comments of my working out what this does
(I'm not reflexively familiar with the ARM instruction set yet. However, I
get a problem in a different place than you do. The instruction previous
to the one you complain about looks wrong to me. Am I reading this wrong?

At 03:37 PM 1/23/04 -0500, you wrote:

>Why is GNU 3.3.2 generating this code? Am I reading this wrong, or am I
>using the wrong compiler??
>
>Thanks for any insight!
>
>void Test(unsigned long Base)
>{
> register volatile U8 * TestP = (volatile U8 *)(Base + 0x5555);
>60000134: E3A01101 MOV R1,#0x40000000

Why load R1 with anything?

>6000013C: E2802055 ADD R2,R0,#0x55

R2 = Base +0x55

>6000015C: E2801C55 ADD R1,R0,#0x5500

R1 = Base + 0x5500. Just destroyed the first instructions activity.

>60000160: E2810055 ADD R0,R1,#0x55

Now R0 = Base + 0x5555, the address you are looking for.

> while (1)
>60000140: E3A01004 MOV R1,#0x4
>60000164: E3A02004 MOV R2,#0x4

Both R1 & R2 are 4. Seems like extra work.

> {
> *TestP = 4;
>60000144: E5C21000 STRB R1,[R2,#0x0]

This looks wrong. Store a byte of value 4 at address 4?

>60000168: E5C02000 STRB R2,[R0,#0x0] <<-- What is THIS??

*(unsigned char *)(Base+0x5555) = 4 This looks like what you actually want.

This looks like an optimizer gone off the rails. Have you tried a lower
optimization level?

Robert

" 'Freedom' has no meaning of itself. There are always restrictions,
be they legal, genetic, or physical. If you don't believe me, try to
chew a radio signal. "

Kelvin Throop, III



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Re: [lpc2100] What Tha..? - Robert Adsett - Jan 23 16:36:00 2004

How large is the test case needed to generate this?

Robert

" 'Freedom' has no meaning of itself. There are always restrictions,
be they legal, genetic, or physical. If you don't believe me, try to
chew a radio signal. "

Kelvin Throop, III




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RE: [lpc2100] What Tha..? - James Dabbs - Jan 23 16:57:00 2004

I think my toolchain is trashed. I'm getting universally BAD code. I
downloaded 3.3.2 from here:

http://www.ariusdsp.com/gnuarm/gnuarm.html

But perhaps I didn't install it correctly. I'm reinstalling it before
getting to far into this. Is there a most common gcc used for arm?

Thanks.





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RE: [lpc2100] What Tha..? - Lewin A.R.W. Edwards - Jan 23 18:45:00 2004


> I think my toolchain is trashed. I'm getting universally BAD code. I
> downloaded 3.3.2 from here:

On principle, since you are using this for the 21xx, I suggest you use
the Keil-supplied version. Yes, it is not the most recent.

> But perhaps I didn't install it correctly. I'm reinstalling it before
> getting to far into this. Is there a most common gcc used for arm?

It depends on the project. Once we qualify a particular piece of code
to ship to end-users, the gcc version used to build it becomes part of
that qualification. By and large, you are safest using a version
downloaded from a tool vendor.

-- Lewin A.R.W. Edwards (http://www.zws.com/)
Learn how to develop high-end embedded systems on a tight budget!
http://www.amazon.com/exec/obidos/ASIN/0750676094/zws-20





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Re: [lpc2100] What Tha..? - Ben Dooks - Jan 24 5:48:00 2004

On Fri, Jan 23, 2004 at 03:37:38PM -0500, James Dabbs wrote:
> Why is GNU 3.3.2 generating this code? Am I reading this wrong, or am I
> using the wrong compiler??
>
> Thanks for any insight!
>
> void Test(unsigned long Base)
> {
> register volatile U8 * TestP = (volatile U8 *)(Base + 0x5555);
> 60000134: E3A01101 MOV R1,#0x40000000
> 6000013C: E2802055 ADD R2,R0,#0x55
> 6000015C: E2801C55 ADD R1,R0,#0x5500
> 60000160: E2810055 ADD R0,R1,#0x55
> while (1)
> 60000140: E3A01004 MOV R1,#0x4
> 60000164: E3A02004 MOV R2,#0x4
> {
> *TestP = 4;
> 60000144: E5C21000 STRB R1,[R2,#0x0]
> 60000168: E5C02000 STRB R2,[R0,#0x0] <<-- What is THIS??
> *TestP = (*TestP) + 1;
> 60000148: E5D2C000 LDRB R12,[R2,#0x0]
> 6000016C: E5D0C000 LDRB R12,[R0,#0x0]
> 60000170: E28C1001 ADD R1,R12,#0x1
> 60000174: E5C01000 STRB R1,[R0,#0x0]
> 60000178: EAFFFFFA B 0x60000168
> 6000017C: 00 **** Invalid Instruction ****
> }

there seems to be some mysterious missing space between
the addresses of several instructions, ie, 60000148 then 6000016c
with no indication if there is any more data inbetween?

--
Ben

Q: What's a light-year?
A: One-third less calories than a regular year.




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RE: [lpc2100] What Tha..? - James Dabbs - Jan 24 8:24:00 2004

> there seems to be some mysterious missing space between the addresses
> of several instructions, ie, 60000148 then 6000016c with no indication
> if there is any more data inbetween?

Yes, in the final analysis (after some sleep), this is a problem of how
the Nohau debugger is showing the disassembled code, probably because
I'm not using the best -g option for it. I think this is turning into a
big cockpit problem.. Sorry for the distraction.

Thanks.



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