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Discussion Groups | | 68hc11 and 8255


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68hc11 and 8255 - Author Unknown - Dec 31 19:00:00 1969


I want to interface 8255 (Intel's PPI Programmable Peripheral interface) with Motorola's 68HC11. Has any one successfully interfaced 8255 to 68HC11 CPU. I tried to interface 8255 to 68HC11 but it doesnot seem to work since timings seem to be different. 8255 data sheet says that CS (chip select) should be active before WR* signal, whereas 68HC11 address is latched in second half of E clock cycle. Hence in 68HC11 system, the CS signal from the address decoder is not wide enough.

Thanks and Regards.

CHITRA PACE Minmax Electronics, Bangalore India.





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Re: 68hc11 and 8255 - Robert Smith - May 4 8:15:00 2002

The buss cycles of the Motorola and Intel busses are fundamentally
different. You have five choices that I see --

1. Don't try it, use a Motorola 6821 instead.

2. Assemble enough external logic (Perhaps a small PAL) to synthesize the
Intel bus timing. See the 8255 data sheet for timing requirements. You may
be able to find some application notes at the Moto web site with examples of
how to do this.

3. Use latches and bus receivers to generate I/O ports.

4. Use shift registers and the SPI to generate I/O ports if speed is not
critical.

5. Attach a WSI PSDxxx Peripheral System Device and use its discrete I/O
pins. You also gain a bunch of memory resources. Try
http://www.st.com/stonline/prodpres/memory/psd/html/psd_idx.htm .

Good luck, Bob Smith --- Avoid computer viruses, Practice safe hex ---

-- Specializing in small, cost effective
embedded control systems -- Robert L. (Bob) Smith
Smith Machine Works, Inc.
9900 Lumlay Road
Richmond, VA 23236 804/745-1065
----- Original Message -----
From: <>
To: <>
Sent: Saturday, May 04, 2002 6:54 AM
Subject: [m68HC11] 68hc11 and 8255 >
> I want to interface 8255 (Intel's PPI Programmable Peripheral interface)
with Motorola's 68HC11. Has any one successfully interfaced 8255 to 68HC11
CPU. I tried to interface 8255 to 68HC11 but it doesnot seem to work since
timings seem to be different. 8255 data sheet says that CS (chip select)
should be active before WR* signal, whereas 68HC11 address is latched in
second half of E clock cycle. Hence in 68HC11 system, the CS signal from the
address decoder is not wide enough.
>
> Thanks and Regards.
>
> CHITRA PACE Minmax Electronics, Bangalore India. >
> To unsubscribe from this group, send an email to:





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RE: 68hc11 and 8255 - Bob Furber - May 4 16:11:00 2002

Hi Chitra,

> I want to interface 8255 (Intel's PPI Programmable
Peripheral
> interface) with Motorola's 68HC11. Has any one
successfully
> interfaced 8255 to 68HC11 CPU. I tried to interface 8255
to
> 68HC11 but it doesnot seem to work since timings seem to
be
> different. 8255 data sheet says that CS (chip select)
should
> be active before WR* signal, whereas 68HC11 address is
> latched in second half of E clock cycle. Hence in 68HC11
> system, the CS signal from the address decoder is not wide
enough.

I don't know if it is of any help, but we have interfaced
the HC16 to an 82C55 and it worked fine. What I don't know
is if the HC11 has a /DS (data strobe signal).

We used an inverter to generate a W/R from the R/W signal.
Then a 74HC32 to generate the /8255W and /8255R signals:
/8255W = R/W | /DS
/8255R = W/R | /DS

Bfn,

Bob Furber

__________________________________________________________

Connect your micro to the internet the easy way
www.microcommander.com

Microcontroller with an obscenity of I/O & features
..in a small footprint www.steroidmicros.com
__________________________________________________________




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Re: 68hc11 and 8255 - John Beatty - May 4 16:37:00 2002


There is an example of such an interface on:

http://www.ee.vt.edu/cel/datasheets/pcim201.pdf

John Beatty wrote:
>
> I want to interface 8255 (Intel's PPI Programmable Peripheral interface) with Motorola's 68HC11. Has any one successfully interfaced 8255 to 68HC11 CPU. I tried to interface 8255 to 68HC11 but it doesnot seem to work since timings seem to be different. 8255 data sheet says that CS (chip select) should be active before WR* signal, whereas 68HC11 address is latched in second half of E clock cycle. Hence in 68HC11 system, the CS signal from the address decoder is not wide enough.
>
> Thanks and Regards.
>
> CHITRA PACE Minmax Electronics, Bangalore India. > To unsubscribe from this group, send an email to:




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Re: 68hc11 and 8255 - Gordon Couger - May 6 4:14:00 2002

It is a PITA. Make sure that the device the 68HC11 is reading presents the
data long enough for the 68HC11 to read it. I had a very very major problem
reading a Intel CAN chip with a 68HC11. It was a know problem with the CAN
chip since it had a fast read register that held the contents of the last
address read on the CAN chip so you read the address then got the results
from the fast read register.

That was a long time ago and thing may be different now. But If I remember
right the 68HC11 has no way to generate the wait signal for the Intel bus.

Good luck
Gordon

Gordon Couger
Stillwater, OK
www.couger.com/gcouger
----- Original Message -----
From: "Robert Smith" <>
To: <>
Sent: Saturday, May 04, 2002 8:15 AM
Subject: Re: [m68HC11] 68hc11 and 8255 : The buss cycles of the Motorola and Intel busses are fundamentally
: different. You have five choices that I see --
:
: 1. Don't try it, use a Motorola 6821 instead.
:
: 2. Assemble enough external logic (Perhaps a small PAL) to synthesize the
: Intel bus timing. See the 8255 data sheet for timing requirements. You
may
: be able to find some application notes at the Moto web site with examples
of
: how to do this.
:
: 3. Use latches and bus receivers to generate I/O ports.
:
: 4. Use shift registers and the SPI to generate I/O ports if speed is not
: critical.
:
: 5. Attach a WSI PSDxxx Peripheral System Device and use its discrete I/O
: pins. You also gain a bunch of memory resources. Try
: http://www.st.com/stonline/prodpres/memory/psd/html/psd_idx.htm .
:
: Good luck, Bob Smith
:
:
: --- Avoid computer viruses, Practice safe hex ---
:
: -- Specializing in small, cost effective
: embedded control systems --
:
:
: Robert L. (Bob) Smith
: Smith Machine Works, Inc.
: 9900 Lumlay Road
: Richmond, VA 23236 804/745-1065
:
:
:
: ----- Original Message -----
: From: <>
: To: <>
: Sent: Saturday, May 04, 2002 6:54 AM
: Subject: [m68HC11] 68hc11 and 8255
:
:
: >
: > I want to interface 8255 (Intel's PPI Programmable Peripheral interface)
: with Motorola's 68HC11. Has any one successfully interfaced 8255 to 68HC11
: CPU. I tried to interface 8255 to 68HC11 but it doesnot seem to work since
: timings seem to be different. 8255 data sheet says that CS (chip select)
: should be active before WR* signal, whereas 68HC11 address is latched in
: second half of E clock cycle. Hence in 68HC11 system, the CS signal from
the
: address decoder is not wide enough.
: >
: > Thanks and Regards.
: >
: > CHITRA PACE Minmax Electronics, Bangalore India.
: >
: >
: >
: > To unsubscribe from this group, send an email to:
: >
: >
: >
: >
: >
: >
: >
: >
:
:
:
: To unsubscribe from this group, send an email to:
:
:
:
:
:
:
:
:




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