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Timer B Problem - nissetest - Jul 16 9:42:27 2008
Hello,
I am a newbie at the MSP430 and I'm having a lot of trouble finding
neccesary information in the datasheets.
My problem is that I cannot get the TB1 output to work as an UART TXD
output. Does anyone know why? Are the TB0 and TB1 different? I Do not
find any information about this. I need to get a UART TXD output on
P4.1/TB1, it works fine on P4.0/TB0 but not on P4.1/TB1. Any idea why?
I am using a MSP430F1611 in a MSP-TS430PM64, MSP-FET430UIF + IAR C/C++
Compiler for MSP430 V4.11A/W32 [Kickstart] (4.11.1.3).
// --- This works (Set_DCO omitted) ---
#define RXD 0x04 // RXD on P2.2
#define TXDB 0x01 // TXD on P4.0
// Conditions for 9600 Baud SW UART, DCO ~ 2MHz
#define Bitime_5 104 // ~ 0.5 bit length
#define Bitime 208 // ~ 9615 baud
#define DELTA 488 // Target DCO = DELTA*(4096)
~2MHz
unsigned int RXTXData;
unsigned char BitCnt;
void TX_Byte (void);
void RX_Ready (void);
void Set_DCO (void);
// M. Buccini
// Texas Instruments Inc.
// Feb 2005
// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version:
3.21A
//**********************************************************************\
*******
#include
void main (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
Set_DCO(); // Set DCO
TBCCTL0 = OUT;
TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
TBCTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
P4SEL = TXDB; // *
P4DIR = TXDB; // *
P2SEL = RXD; // P2.2/TA0 as RXD input
// Mainloop
for (;;)
{
RX_Ready(); // UART ready to RX one Byte
_BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
until char RXed
TX_Byte(); // TX Back RXed Byte
Received
}
}
// Function Transmits Character from RXTXData Buffer
void TX_Byte (void)
{
BitCnt = 0xA; // Load Bit counter, 8data +
ST/SP
TBCCR0 = TBR; //*
TBCCR0 += Bitime; //*
RXTXData |= 0x100; // Add mark stop bit to
RXTXData
RXTXData = RXTXData << 1; // Add space start bit
TBCCTL0 = OUTMOD0 + CCIE; //*
while (TBCCTL0 & CCIE); // Wait for TX completion
}
// Function Readies UART to Receive Character into RXTXData Buffer
// Sync capture not possible as DCO=TACLK=SMCLK can be off !!
void RX_Ready (void)
{
BitCnt = 0x8; // Load Bit counter
CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
TBCCTL0 &= ~CCIE;
}
// Timer A0 interrupt service routine
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
CCR0 += Bitime; // Add Offset to CCR0
if( CCTL0 & CAP ) // Capture mode = start bit
edge
{
CCTL0 &= ~ CAP; // Switch from capture to
compare mode
CCR0 += Bitime_5;
_BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after reti
}
else
{
RXTXData = RXTXData >> 1;
if (CCTL0 & SCCI) // Get bit waiting in receive
latch
RXTXData |= 0x80;
BitCnt --; // All bits RXed?
if ( BitCnt == 0)
//>>>>>>>>>> Decode of Received Byte Here
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
{
CCTL0 &= ~ CCIE; // All bits RXed, disable
interrupt
_BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
0(SR)
}
//>>>>>>>>>> Decode of Received Byte Here
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
}
}
// Timer B interrupt service routine
#pragma vector=TIMERB0_VECTOR
__interrupt void Timer_B (void)
{
TBCCR0 += Bitime; // Add Offset to CCR0
if ( BitCnt == 0)
TBCCTL0 &= ~ CCIE; // All bits TXed, disable
interrupt
else
{
TBCCTL0 |= OUTMOD2; // TX Space
if (RXTXData & 0x01)
TBCCTL0 &= ~ OUTMOD2; // TX Mark
RXTXData = RXTXData >> 1;
BitCnt --;
}
}
// --- Does not work when output is moved to P4.1/TB1 (Set_DCO omitted)
---
#define RXD 0x04 // RXD on P2.2
#define TXDB 0x02 // TXD on P4.1
// Conditions for 9600 Baud SW UART, DCO ~ 2MHz
#define Bitime_5 104 // ~ 0.5 bit length
#define Bitime 208 // ~ 9615 baud
#define DELTA 488 // Target DCO = DELTA*(4096)
~2MHz
unsigned int RXTXData;
unsigned char BitCnt;
void TX_Byte (void);
void RX_Ready (void);
void Set_DCO (void);
// M. Buccini
// Texas Instruments Inc.
// Feb 2005
// Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version:
3.21A
//**********************************************************************\
*******
#include
void main (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
Set_DCO(); // Set DCO
TBCCTL1 = OUT;
TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
TBCTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
P4SEL = TXDB; // *
P4DIR = TXDB; // *
P2SEL = RXD; // P2.2/TA0 as RXD input
// Mainloop
for (;;)
{
RX_Ready(); // UART ready to RX one Byte
_BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
until char RXed
TX_Byte(); // TX Back RXed Byte
Received
}
}
// Function Transmits Character from RXTXData Buffer
void TX_Byte (void)
{
BitCnt = 0xA; // Load Bit counter, 8data +
ST/SP
TBCCR1 = TBR; //*
TBCCR1 += Bitime; //*
RXTXData |= 0x100; // Add mark stop bit to
RXTXData
RXTXData = RXTXData << 1; // Add space start bit
TBCCTL1 = OUTMOD0 + CCIE; //*
while (TBCCTL1 & CCIE); // Wait for TX completion
}
// Function Readies UART to Receive Character into RXTXData Buffer
// Sync capture not possible as DCO=TACLK=SMCLK can be off !!
void RX_Ready (void)
{
BitCnt = 0x8; // Load Bit counter
CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
TBCCTL1 &= ~CCIE;
}
// Timer A0 interrupt service routine
#pragma vector=TIMERA0_VECTOR
__interrupt void Timer_A (void)
{
CCR0 += Bitime; // Add Offset to CCR0
if( CCTL0 & CAP ) // Capture mode = start bit
edge
{
CCTL0 &= ~ CAP; // Switch from capture to
compare mode
CCR0 += Bitime_5;
_BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after reti
}
else
{
RXTXData = RXTXData >> 1;
if (CCTL0 & SCCI) // Get bit waiting in receive
latch
RXTXData |= 0x80;
BitCnt --; // All bits RXed?
if ( BitCnt == 0)
//>>>>>>>>>> Decode of Received Byte Here
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
{
CCTL0 &= ~ CCIE; // All bits RXed, disable
interrupt
_BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
0(SR)
}
//>>>>>>>>>> Decode of Received Byte Here
<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
}
}
// Timer B interrupt service routine
#pragma vector=TIMERB1_VECTOR
__interrupt void Timer_B (void)
{
TBCCR1 += Bitime; // Add Offset to CCR0
if ( BitCnt == 0)
TBCCTL1 &= ~ CCIE; // All bits TXed, disable
interrupt
else
{
TBCCTL1 |= OUTMOD2; // TX Space
if (RXTXData & 0x01)
TBCCTL1 &= ~ OUTMOD2; // TX Mark
RXTXData = RXTXData >> 1;
BitCnt --;
}
}
Regards,
Nisse
[Non-text portions of this message have been removed]
------------------------------------

(You need to be a member of msp430 -- send a blank email to msp430-subscribe@yahoogroups.com )
Re: Timer B Problem - Tom Baugh - Jul 16 10:01:31 2008
--- In m...@yahoogroups.com, "nissetest"
wrote:
> Hello,
>
> I am a newbie at the MSP430 and I'm having a lot of trouble finding
> neccesary information in the datasheets.
>
> My problem is that I cannot get the TB1 output to work as an UART TXD
> output. Does anyone know why? Are the TB0 and TB1 different? I Do not
> find any information about this. I need to get a UART TXD output on
> P4.1/TB1, it works fine on P4.0/TB0 but not on P4.1/TB1. Any idea why?
>
> I am using a MSP430F1611 in a MSP-TS430PM64, MSP-FET430UIF + IAR C/C++
> Compiler for MSP430 V4.11A/W32 [Kickstart] (4.11.1.3).
Nisse,
You are right that using the datasheets and even sample code alone can
be overwhelming or frustrating.
A couple of months ago we released a book about MSP430 state machine
programming, which is helpful for getting the most out of MSP430
designs. This book is written for our ES2274 board, with the F2274
chip, and uses the KickStart IDE, but the overall concepts are useful
for any MSP430 design and IDE.
In chapter 7, we walk through the implementation of a TimerB UART,
using TB1 for Tx and TB2 for Rx. We show in the book why it would be
important to reserve TB0 for other purposes, as there are significant
differences between the 0 channel and the others.
This book can be found on amazon:
http://www.amazon.com/gp/redirect.html?ie=UTF8&location=http%3A%2F%
2Fwww.amazon.com%2FMSP430-State-Machine-Programming-ES2274%2Fdp%
2F0975475924%3Fie%3DUTF8%26s%3Dbooks%26qid%3D1214397954%26sr%3D8-
1&tag=softcom-20&linkCode=ur2&camp=1789&creative=9325
You may have to mush that URL around in notepad to get it to work, or
you can search amazon for MSP430 as one word. Our green and white
title should be at the top of the list.
Good luck!
Tom
------------------------------------

(You need to be a member of msp430 -- send a blank email to msp430-subscribe@yahoogroups.com )Re: Timer B Problem - old_cow_yellow - Jul 16 10:06:25 2008
TB0 has its own interrupt vector. The ISR works as is.
TB1 shares an interrupt vector with others.
Inside your:
> // Timer B interrupt service routine
> #pragma vector=TIMERB1_VECTOR
> __interrupt void Timer_B (void)
> {
> ...
> }
You need to clear the IFG of TA1 even if other shared interrupts are
not used at all. But it is best to use TBIV which will automatically
clear the pending IFG.
See User's Guide for details.
--- In m...@yahoogroups.com, "nissetest"
wrote:
> Hello,
>
> I am a newbie at the MSP430 and I'm having a lot of trouble finding
> neccesary information in the datasheets.
>
> My problem is that I cannot get the TB1 output to work as an UART TXD
> output. Does anyone know why? Are the TB0 and TB1 different? I Do not
> find any information about this. I need to get a UART TXD output on
> P4.1/TB1, it works fine on P4.0/TB0 but not on P4.1/TB1. Any idea why?
>
> I am using a MSP430F1611 in a MSP-TS430PM64, MSP-FET430UIF + IAR C/C++
> Compiler for MSP430 V4.11A/W32 [Kickstart] (4.11.1.3).
>
> // --- This works (Set_DCO omitted) ---
>
> #define RXD 0x04 // RXD on P2.2
> #define TXDB 0x01 // TXD on P4.0
>
> // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
>
> #define Bitime_5 104 // ~ 0.5 bit length
> #define Bitime 208 // ~ 9615 baud
> #define DELTA 488 // Target DCO = DELTA*(4096)
> ~2MHz
>
> unsigned int RXTXData;
> unsigned char BitCnt;
>
> void TX_Byte (void);
> void RX_Ready (void);
> void Set_DCO (void);
>
> // M. Buccini
> // Texas Instruments Inc.
> // Feb 2005
> // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version:
> 3.21A
>
//**********************************************************************\
> *******
>
> #include
> void main (void)
> {
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
>
> BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
> Set_DCO(); // Set DCO
>
> TBCCTL0 = OUT;
> TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> TBCTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> P4SEL = TXDB; // *
> P4DIR = TXDB; // *
> P2SEL = RXD; // P2.2/TA0 as RXD input
>
> // Mainloop
> for (;;)
> {
> RX_Ready(); // UART ready to RX one
Byte
> _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
> until char RXed
> TX_Byte(); // TX Back RXed Byte
> Received
> }
> }
> // Function Transmits Character from RXTXData Buffer
> void TX_Byte (void)
> {
> BitCnt = 0xA; // Load Bit counter,
8data +
> ST/SP
> TBCCR0 = TBR; //*
> TBCCR0 += Bitime; //*
> RXTXData |= 0x100; // Add mark stop bit to
> RXTXData
> RXTXData = RXTXData << 1; // Add space start bit
> TBCCTL0 = OUTMOD0 + CCIE; //*
> while (TBCCTL0 & CCIE); // Wait for TX completion
> }
> // Function Readies UART to Receive Character into RXTXData Buffer
> // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> void RX_Ready (void)
> {
> BitCnt = 0x8; // Load Bit counter
> CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
> TBCCTL0 &= ~CCIE;
> }
>
> // Timer A0 interrupt service routine
> #pragma vector=TIMERA0_VECTOR
> __interrupt void Timer_A (void)
> {
> CCR0 += Bitime; // Add Offset to CCR0
>
> if( CCTL0 & CAP ) // Capture mode = start bit
> edge
> {
> CCTL0 &= ~ CAP; // Switch from capture to
> compare mode
> CCR0 += Bitime_5;
> _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after
reti
> }
> else
> {
> RXTXData = RXTXData >> 1;
> if (CCTL0 & SCCI) // Get bit waiting in receive
> latch
> RXTXData |= 0x80;
> BitCnt --; // All bits RXed?
> if ( BitCnt == 0)
> //>>>>>>>>>> Decode of Received Byte Here
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> {
> CCTL0 &= ~ CCIE; // All bits RXed, disable
> interrupt
> _BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
> 0(SR)
> }
> //>>>>>>>>>> Decode of Received Byte Here
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> }
> }
>
> // Timer B interrupt service routine
> #pragma vector=TIMERB0_VECTOR
> __interrupt void Timer_B (void)
> {
> TBCCR0 += Bitime; // Add Offset to CCR0
>
> if ( BitCnt == 0)
> TBCCTL0 &= ~ CCIE; // All bits TXed, disable
> interrupt
> else
> {
> TBCCTL0 |= OUTMOD2; // TX Space
> if (RXTXData & 0x01)
> TBCCTL0 &= ~ OUTMOD2; // TX Mark
> RXTXData = RXTXData >> 1;
> BitCnt --;
> }
> }
> // --- Does not work when output is moved to P4.1/TB1 (Set_DCO omitted)
> ---
>
> #define RXD 0x04 // RXD on P2.2
> #define TXDB 0x02 // TXD on P4.1
>
> // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
>
> #define Bitime_5 104 // ~ 0.5 bit length
> #define Bitime 208 // ~ 9615 baud
> #define DELTA 488 // Target DCO = DELTA*(4096)
> ~2MHz
>
> unsigned int RXTXData;
> unsigned char BitCnt;
>
> void TX_Byte (void);
> void RX_Ready (void);
> void Set_DCO (void);
>
> // M. Buccini
> // Texas Instruments Inc.
> // Feb 2005
> // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version:
> 3.21A
>
//**********************************************************************\
> *******
>
> #include
> void main (void)
> {
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
>
> BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
> Set_DCO(); // Set DCO
>
> TBCCTL1 = OUT;
> TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> TBCTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> P4SEL = TXDB; // *
> P4DIR = TXDB; // *
> P2SEL = RXD; // P2.2/TA0 as RXD input
>
> // Mainloop
> for (;;)
> {
> RX_Ready(); // UART ready to RX one
Byte
> _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
> until char RXed
> TX_Byte(); // TX Back RXed Byte
> Received
> }
> }
>
> // Function Transmits Character from RXTXData Buffer
> void TX_Byte (void)
> {
> BitCnt = 0xA; // Load Bit counter,
8data +
> ST/SP
> TBCCR1 = TBR; //*
> TBCCR1 += Bitime; //*
> RXTXData |= 0x100; // Add mark stop bit to
> RXTXData
> RXTXData = RXTXData << 1; // Add space start bit
> TBCCTL1 = OUTMOD0 + CCIE; //*
> while (TBCCTL1 & CCIE); // Wait for TX completion
> }
> // Function Readies UART to Receive Character into RXTXData Buffer
> // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> void RX_Ready (void)
> {
> BitCnt = 0x8; // Load Bit counter
> CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
> TBCCTL1 &= ~CCIE;
> }
>
> // Timer A0 interrupt service routine
> #pragma vector=TIMERA0_VECTOR
> __interrupt void Timer_A (void)
> {
> CCR0 += Bitime; // Add Offset to CCR0
>
> if( CCTL0 & CAP ) // Capture mode = start bit
> edge
> {
> CCTL0 &= ~ CAP; // Switch from capture to
> compare mode
> CCR0 += Bitime_5;
> _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after
reti
> }
> else
> {
> RXTXData = RXTXData >> 1;
> if (CCTL0 & SCCI) // Get bit waiting in receive
> latch
> RXTXData |= 0x80;
> BitCnt --; // All bits RXed?
> if ( BitCnt == 0)
> //>>>>>>>>>> Decode of Received Byte Here
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> {
> CCTL0 &= ~ CCIE; // All bits RXed, disable
> interrupt
> _BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
> 0(SR)
> }
> //>>>>>>>>>> Decode of Received Byte Here
> <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> }
> }
>
> // Timer B interrupt service routine
> #pragma vector=TIMERB1_VECTOR
> __interrupt void Timer_B (void)
> {
> TBCCR1 += Bitime; // Add Offset to CCR0
>
> if ( BitCnt == 0)
> TBCCTL1 &= ~ CCIE; // All bits TXed, disable
> interrupt
> else
> {
> TBCCTL1 |= OUTMOD2; // TX Space
> if (RXTXData & 0x01)
> TBCCTL1 &= ~ OUTMOD2; // TX Mark
> RXTXData = RXTXData >> 1;
> BitCnt --;
> }
> }
>
> Regards,
> Nisse
>
> [Non-text portions of this message have been removed]
>
------------------------------------

(You need to be a member of msp430 -- send a blank email to msp430-subscribe@yahoogroups.com )Re: Timer B Problem - old_cow_yellow - Jul 16 10:28:39 2008
There was a typo.
I said "clear the IFG of TA1"
What I meant was, "clear the CCIFG bit of the TBCCTL0 register".
--- In m...@yahoogroups.com, "old_cow_yellow"
wrote:
>
> TB0 has its own interrupt vector. The ISR works as is.
> TB1 shares an interrupt vector with others.
> Inside your:
> > // Timer B interrupt service routine
> > #pragma vector=TIMERB1_VECTOR
> > __interrupt void Timer_B (void)
> > {
> > ...
> > }
> You need to clear the IFG of TA1 even if other shared interrupts are
> not used at all. But it is best to use TBIV which will automatically
> clear the pending IFG.
> See User's Guide for details.
>
> --- In m...@yahoogroups.com, "nissetest" wrote:
> >
> >
> > Hello,
> >
> > I am a newbie at the MSP430 and I'm having a lot of trouble finding
> > neccesary information in the datasheets.
> >
> > My problem is that I cannot get the TB1 output to work as an UART TXD
> > output. Does anyone know why? Are the TB0 and TB1 different? I Do not
> > find any information about this. I need to get a UART TXD output on
> > P4.1/TB1, it works fine on P4.0/TB0 but not on P4.1/TB1. Any idea why?
> >
> > I am using a MSP430F1611 in a MSP-TS430PM64, MSP-FET430UIF + IAR C/C++
> > Compiler for MSP430 V4.11A/W32 [Kickstart] (4.11.1.3).
> >
> > // --- This works (Set_DCO omitted) ---
> >
> > #define RXD 0x04 // RXD on P2.2
> > #define TXDB 0x01 // TXD on P4.0
> >
> > // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
> >
> > #define Bitime_5 104 // ~ 0.5 bit length
> > #define Bitime 208 // ~ 9615 baud
> > #define DELTA 488 // Target DCO =
DELTA*(4096)
> > ~2MHz
> >
> > unsigned int RXTXData;
> > unsigned char BitCnt;
> >
> > void TX_Byte (void);
> > void RX_Ready (void);
> > void Set_DCO (void);
> >
> > // M. Buccini
> > // Texas Instruments Inc.
> > // Feb 2005
> > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version:
> > 3.21A
> //**********************************************************************\
> > *******
> >
> > #include
> >
> >
> > void main (void)
> > {
> > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> >
> > BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
> > Set_DCO(); // Set DCO
> >
> > TBCCTL0 = OUT;
> > TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> > TBCTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> > P4SEL = TXDB; // *
> > P4DIR = TXDB; // *
> > P2SEL = RXD; // P2.2/TA0 as RXD input
> >
> > // Mainloop
> > for (;;)
> > {
> > RX_Ready(); // UART ready to RX one
> Byte
> > _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
> > until char RXed
> > TX_Byte(); // TX Back RXed Byte
> > Received
> > }
> > }
> >
> >
> > // Function Transmits Character from RXTXData Buffer
> > void TX_Byte (void)
> > {
> > BitCnt = 0xA; // Load Bit counter,
> 8data +
> > ST/SP
> > TBCCR0 = TBR; //*
> > TBCCR0 += Bitime; //*
> > RXTXData |= 0x100; // Add mark stop bit to
> > RXTXData
> > RXTXData = RXTXData << 1; // Add space start bit
> > TBCCTL0 = OUTMOD0 + CCIE; //*
> > while (TBCCTL0 & CCIE); // Wait for TX completion
> > }
> >
> >
> > // Function Readies UART to Receive Character into RXTXData Buffer
> > // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> > void RX_Ready (void)
> > {
> > BitCnt = 0x8; // Load Bit counter
> > CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
> > TBCCTL0 &= ~CCIE;
> > }
> >
> > // Timer A0 interrupt service routine
> > #pragma vector=TIMERA0_VECTOR
> > __interrupt void Timer_A (void)
> > {
> > CCR0 += Bitime; // Add Offset to CCR0
> >
> > if( CCTL0 & CAP ) // Capture mode = start bit
> > edge
> > {
> > CCTL0 &= ~ CAP; // Switch from capture to
> > compare mode
> > CCR0 += Bitime_5;
> > _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after
> reti
> > }
> > else
> > {
> > RXTXData = RXTXData >> 1;
> > if (CCTL0 & SCCI) // Get bit waiting in
receive
> > latch
> > RXTXData |= 0x80;
> > BitCnt --; // All bits RXed?
> > if ( BitCnt == 0)
> > //>>>>>>>>>> Decode of Received Byte Here
> > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > {
> > CCTL0 &= ~ CCIE; // All bits RXed, disable
> > interrupt
> > _BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
> > 0(SR)
> > }
> > //>>>>>>>>>> Decode of Received Byte Here
> > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > }
> > }
> >
> > // Timer B interrupt service routine
> > #pragma vector=TIMERB0_VECTOR
> > __interrupt void Timer_B (void)
> > {
> > TBCCR0 += Bitime; // Add Offset to CCR0
> >
> > if ( BitCnt == 0)
> > TBCCTL0 &= ~ CCIE; // All bits TXed,
disable
> > interrupt
> > else
> > {
> > TBCCTL0 |= OUTMOD2; // TX Space
> > if (RXTXData & 0x01)
> > TBCCTL0 &= ~ OUTMOD2; // TX Mark
> > RXTXData = RXTXData >> 1;
> > BitCnt --;
> > }
> > }
> >
> >
> > // --- Does not work when output is moved to P4.1/TB1 (Set_DCO
omitted)
> > ---
> >
> >
> >
> > #define RXD 0x04 // RXD on P2.2
> > #define TXDB 0x02 // TXD on P4.1
> >
> > // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
> >
> > #define Bitime_5 104 // ~ 0.5 bit length
> > #define Bitime 208 // ~ 9615 baud
> > #define DELTA 488 // Target DCO =
DELTA*(4096)
> > ~2MHz
> >
> > unsigned int RXTXData;
> > unsigned char BitCnt;
> >
> > void TX_Byte (void);
> > void RX_Ready (void);
> > void Set_DCO (void);
> >
> > // M. Buccini
> > // Texas Instruments Inc.
> > // Feb 2005
> > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench Version:
> > 3.21A
> //**********************************************************************\
> > *******
> >
> > #include
> >
> >
> > void main (void)
> > {
> > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> >
> > BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
> > Set_DCO(); // Set DCO
> >
> > TBCCTL1 = OUT;
> > TACTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> > TBCTL = TASSEL_2 + MC_2; // SMCLK, continuous mode
> > P4SEL = TXDB; // *
> > P4DIR = TXDB; // *
> > P2SEL = RXD; // P2.2/TA0 as RXD input
> >
> > // Mainloop
> > for (;;)
> > {
> > RX_Ready(); // UART ready to RX one
> Byte
> > _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
> > until char RXed
> > TX_Byte(); // TX Back RXed Byte
> > Received
> > }
> > }
> >
> > // Function Transmits Character from RXTXData Buffer
> > void TX_Byte (void)
> > {
> > BitCnt = 0xA; // Load Bit counter,
> 8data +
> > ST/SP
> > TBCCR1 = TBR; //*
> > TBCCR1 += Bitime; //*
> > RXTXData |= 0x100; // Add mark stop bit to
> > RXTXData
> > RXTXData = RXTXData << 1; // Add space start bit
> > TBCCTL1 = OUTMOD0 + CCIE; //*
> > while (TBCCTL1 & CCIE); // Wait for TX completion
> > }
> >
> >
> > // Function Readies UART to Receive Character into RXTXData Buffer
> > // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> > void RX_Ready (void)
> > {
> > BitCnt = 0x8; // Load Bit counter
> > CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
> > TBCCTL1 &= ~CCIE;
> > }
> >
> > // Timer A0 interrupt service routine
> > #pragma vector=TIMERA0_VECTOR
> > __interrupt void Timer_A (void)
> > {
> > CCR0 += Bitime; // Add Offset to CCR0
> >
> > if( CCTL0 & CAP ) // Capture mode = start bit
> > edge
> > {
> > CCTL0 &= ~ CAP; // Switch from capture to
> > compare mode
> > CCR0 += Bitime_5;
> > _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after
> reti
> > }
> > else
> > {
> > RXTXData = RXTXData >> 1;
> > if (CCTL0 & SCCI) // Get bit waiting in
receive
> > latch
> > RXTXData |= 0x80;
> > BitCnt --; // All bits RXed?
> > if ( BitCnt == 0)
> > //>>>>>>>>>> Decode of Received Byte Here
> > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > {
> > CCTL0 &= ~ CCIE; // All bits RXed, disable
> > interrupt
> > _BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
> > 0(SR)
> > }
> > //>>>>>>>>>> Decode of Received Byte Here
> > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > }
> > }
> >
> > // Timer B interrupt service routine
> > #pragma vector=TIMERB1_VECTOR
> > __interrupt void Timer_B (void)
> > {
> > TBCCR1 += Bitime; // Add Offset to CCR0
> >
> > if ( BitCnt == 0)
> > TBCCTL1 &= ~ CCIE; // All bits TXed,
disable
> > interrupt
> > else
> > {
> > TBCCTL1 |= OUTMOD2; // TX Space
> > if (RXTXData & 0x01)
> > TBCCTL1 &= ~ OUTMOD2; // TX Mark
> > RXTXData = RXTXData >> 1;
> > BitCnt --;
> > }
> > }
> >
> > Regards,
> > Nisse
> >
> >
> >
> > [Non-text portions of this message have been removed]
>
------------------------------------

(You need to be a member of msp430 -- send a blank email to msp430-subscribe@yahoogroups.com )Re: Timer B Problem - old_cow_yellow - Jul 16 10:30:43 2008
Wrong again.
Should be "clear the CCIFG bit of the TBCCTL1 register"
--- In m...@yahoogroups.com, "old_cow_yellow"
wrote:
>
> There was a typo.
> I said "clear the IFG of TA1"
> What I meant was, "clear the CCIFG bit of the TBCCTL0 register".
>
> --- In m...@yahoogroups.com, "old_cow_yellow"
> wrote:
> >
> > TB0 has its own interrupt vector. The ISR works as is.
> > TB1 shares an interrupt vector with others.
> > Inside your:
> > > // Timer B interrupt service routine
> > > #pragma vector=TIMERB1_VECTOR
> > > __interrupt void Timer_B (void)
> > > {
> > > ...
> > > }
> > You need to clear the IFG of TA1 even if other shared interrupts are
> > not used at all. But it is best to use TBIV which will automatically
> > clear the pending IFG.
> > See User's Guide for details.
> >
> > --- In m...@yahoogroups.com, "nissetest" wrote:
> > >
> > >
> > > Hello,
> > >
> > > I am a newbie at the MSP430 and I'm having a lot of trouble finding
> > > neccesary information in the datasheets.
> > >
> > > My problem is that I cannot get the TB1 output to work as an
UART TXD
> > > output. Does anyone know why? Are the TB0 and TB1 different? I
Do not
> > > find any information about this. I need to get a UART TXD output on
> > > P4.1/TB1, it works fine on P4.0/TB0 but not on P4.1/TB1. Any
idea why?
> > >
> > > I am using a MSP430F1611 in a MSP-TS430PM64, MSP-FET430UIF + IAR
C/C++
> > > Compiler for MSP430 V4.11A/W32 [Kickstart] (4.11.1.3).
> > >
> > > // --- This works (Set_DCO omitted) ---
> > >
> > > #define RXD 0x04 // RXD on P2.2
> > > #define TXDB 0x01 // TXD on P4.0
> > >
> > > // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
> > >
> > > #define Bitime_5 104 // ~ 0.5 bit length
> > > #define Bitime 208 // ~ 9615 baud
> > > #define DELTA 488 // Target DCO =
> DELTA*(4096)
> > > ~2MHz
> > >
> > > unsigned int RXTXData;
> > > unsigned char BitCnt;
> > >
> > > void TX_Byte (void);
> > > void RX_Ready (void);
> > > void Set_DCO (void);
> > >
> > > // M. Buccini
> > > // Texas Instruments Inc.
> > > // Feb 2005
> > > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench
Version:
> > > 3.21A
> > >
> //**********************************************************************\
> > > *******
> > >
> > > #include
> > >
> > >
> > > void main (void)
> > > {
> > > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> > >
> > > BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
> > > Set_DCO(); // Set DCO
> > >
> > > TBCCTL0 = OUT;
> > > TACTL = TASSEL_2 + MC_2; // SMCLK,
continuous mode
> > > TBCTL = TASSEL_2 + MC_2; // SMCLK,
continuous mode
> > > P4SEL = TXDB; // *
> > > P4DIR = TXDB; // *
> > > P2SEL = RXD; // P2.2/TA0 as RXD
input
> > >
> > > // Mainloop
> > > for (;;)
> > > {
> > > RX_Ready(); // UART ready to RX one
> > Byte
> > > _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
> > > until char RXed
> > > TX_Byte(); // TX Back RXed Byte
> > > Received
> > > }
> > > }
> > >
> > >
> > > // Function Transmits Character from RXTXData Buffer
> > > void TX_Byte (void)
> > > {
> > > BitCnt = 0xA; // Load Bit counter,
> > 8data +
> > > ST/SP
> > > TBCCR0 = TBR; //*
> > > TBCCR0 += Bitime; //*
> > > RXTXData |= 0x100; // Add mark stop bit to
> > > RXTXData
> > > RXTXData = RXTXData << 1; // Add space start bit
> > > TBCCTL0 = OUTMOD0 + CCIE; //*
> > > while (TBCCTL0 & CCIE); // Wait for TX
completion
> > > }
> > >
> > >
> > > // Function Readies UART to Receive Character into RXTXData Buffer
> > > // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> > > void RX_Ready (void)
> > > {
> > > BitCnt = 0x8; // Load Bit counter
> > > CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
> > > TBCCTL0 &= ~CCIE;
> > > }
> > >
> > > // Timer A0 interrupt service routine
> > > #pragma vector=TIMERA0_VECTOR
> > > __interrupt void Timer_A (void)
> > > {
> > > CCR0 += Bitime; // Add Offset to CCR0
> > >
> > > if( CCTL0 & CAP ) // Capture mode =
start bit
> > > edge
> > > {
> > > CCTL0 &= ~ CAP; // Switch from
capture to
> > > compare mode
> > > CCR0 += Bitime_5;
> > > _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after
> > reti
> > > }
> > > else
> > > {
> > > RXTXData = RXTXData >> 1;
> > > if (CCTL0 & SCCI) // Get bit waiting in
> receive
> > > latch
> > > RXTXData |= 0x80;
> > > BitCnt --; // All bits RXed?
> > > if ( BitCnt == 0)
> > > //>>>>>>>>>> Decode of Received Byte Here
> > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > {
> > > CCTL0 &= ~ CCIE; // All bits RXed,
disable
> > > interrupt
> > > _BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
> > > 0(SR)
> > > }
> > > //>>>>>>>>>> Decode of Received Byte Here
> > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > }
> > > }
> > >
> > > // Timer B interrupt service routine
> > > #pragma vector=TIMERB0_VECTOR
> > > __interrupt void Timer_B (void)
> > > {
> > > TBCCR0 += Bitime; // Add Offset to CCR0
> > >
> > > if ( BitCnt == 0)
> > > TBCCTL0 &= ~ CCIE; // All bits TXed,
> disable
> > > interrupt
> > > else
> > > {
> > > TBCCTL0 |= OUTMOD2; // TX Space
> > > if (RXTXData & 0x01)
> > > TBCCTL0 &= ~ OUTMOD2; // TX Mark
> > > RXTXData = RXTXData >> 1;
> > > BitCnt --;
> > > }
> > > }
> > >
> > >
> > > // --- Does not work when output is moved to P4.1/TB1 (Set_DCO
> omitted)
> > > ---
> > >
> > >
> > >
> > > #define RXD 0x04 // RXD on P2.2
> > > #define TXDB 0x02 // TXD on P4.1
> > >
> > > // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
> > >
> > > #define Bitime_5 104 // ~ 0.5 bit length
> > > #define Bitime 208 // ~ 9615 baud
> > > #define DELTA 488 // Target DCO =
> DELTA*(4096)
> > > ~2MHz
> > >
> > > unsigned int RXTXData;
> > > unsigned char BitCnt;
> > >
> > > void TX_Byte (void);
> > > void RX_Ready (void);
> > > void Set_DCO (void);
> > >
> > > // M. Buccini
> > > // Texas Instruments Inc.
> > > // Feb 2005
> > > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench
Version:
> > > 3.21A
> > >
> //**********************************************************************\
> > > *******
> > >
> > > #include
> > >
> > >
> > > void main (void)
> > > {
> > > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> > >
> > > BCSCTL1 |= DIVA_3; // ACLK = LFXT1CLK/8
> > > Set_DCO(); // Set DCO
> > >
> > > TBCCTL1 = OUT;
> > > TACTL = TASSEL_2 + MC_2; // SMCLK,
continuous mode
> > > TBCTL = TASSEL_2 + MC_2; // SMCLK,
continuous mode
> > > P4SEL = TXDB; // *
> > > P4DIR = TXDB; // *
> > > P2SEL = RXD; // P2.2/TA0 as RXD
input
> > >
> > > // Mainloop
> > > for (;;)
> > > {
> > > RX_Ready(); // UART ready to RX one
> > Byte
> > > _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/ interr
> > > until char RXed
> > > TX_Byte(); // TX Back RXed Byte
> > > Received
> > > }
> > > }
> > >
> > > // Function Transmits Character from RXTXData Buffer
> > > void TX_Byte (void)
> > > {
> > > BitCnt = 0xA; // Load Bit counter,
> > 8data +
> > > ST/SP
> > > TBCCR1 = TBR; //*
> > > TBCCR1 += Bitime; //*
> > > RXTXData |= 0x100; // Add mark stop bit to
> > > RXTXData
> > > RXTXData = RXTXData << 1; // Add space start bit
> > > TBCCTL1 = OUTMOD0 + CCIE; //*
> > > while (TBCCTL1 & CCIE); // Wait for TX
completion
> > > }
> > >
> > >
> > > // Function Readies UART to Receive Character into RXTXData Buffer
> > > // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> > > void RX_Ready (void)
> > > {
> > > BitCnt = 0x8; // Load Bit counter
> > > CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge, Cap
> > > TBCCTL1 &= ~CCIE;
> > > }
> > >
> > > // Timer A0 interrupt service routine
> > > #pragma vector=TIMERA0_VECTOR
> > > __interrupt void Timer_A (void)
> > > {
> > > CCR0 += Bitime; // Add Offset to CCR0
> > >
> > > if( CCTL0 & CAP ) // Capture mode =
start bit
> > > edge
> > > {
> > > CCTL0 &= ~ CAP; // Switch from
capture to
> > > compare mode
> > > CCR0 += Bitime_5;
> > > _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins on after
> > reti
> > > }
> > > else
> > > {
> > > RXTXData = RXTXData >> 1;
> > > if (CCTL0 & SCCI) // Get bit waiting in
> receive
> > > latch
> > > RXTXData |= 0x80;
> > > BitCnt --; // All bits RXed?
> > > if ( BitCnt == 0)
> > > //>>>>>>>>>> Decode of Received Byte Here
> > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > {
> > > CCTL0 &= ~ CCIE; // All bits RXed,
disable
> > > interrupt
> > > _BIC_SR_IRQ(LPM3_bits); // Clear LPM3 bits from
> > > 0(SR)
> > > }
> > > //>>>>>>>>>> Decode of Received Byte Here
> > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > }
> > > }
> > >
> > > // Timer B interrupt service routine
> > > #pragma vector=TIMERB1_VECTOR
> > > __interrupt void Timer_B (void)
> > > {
> > > TBCCR1 += Bitime; // Add Offset to CCR0
> > >
> > > if ( BitCnt == 0)
> > > TBCCTL1 &= ~ CCIE; // All bits TXed,
> disable
> > > interrupt
> > > else
> > > {
> > > TBCCTL1 |= OUTMOD2; // TX Space
> > > if (RXTXData & 0x01)
> > > TBCCTL1 &= ~ OUTMOD2; // TX Mark
> > > RXTXData = RXTXData >> 1;
> > > BitCnt --;
> > > }
> > > }
> > >
> > > Regards,
> > > Nisse
> > >
> > >
> > >
> > > [Non-text portions of this message have been removed]
> > >
>
------------------------------------

(You need to be a member of msp430 -- send a blank email to msp430-subscribe@yahoogroups.com )Re: Timer B Problem - nissetest - Jul 17 3:59:03 2008
Thanks! That did solve my problem. Now I also found the information
in the User's Guide (When I knew what to look for).
Regards,
Nisse
--- In m...@yahoogroups.com, "old_cow_yellow"
wrote:
>
> Wrong again.
> Should be "clear the CCIFG bit of the TBCCTL1 register"
> --- In m...@yahoogroups.com, "old_cow_yellow"
> wrote:
> >
> > There was a typo.
> > I said "clear the IFG of TA1"
> > What I meant was, "clear the CCIFG bit of the TBCCTL0 register".
> >
> > --- In m...@yahoogroups.com, "old_cow_yellow"
> > wrote:
> > >
> > > TB0 has its own interrupt vector. The ISR works as is.
> > > TB1 shares an interrupt vector with others.
> > > Inside your:
> > > > // Timer B interrupt service routine
> > > > #pragma vector=TIMERB1_VECTOR
> > > > __interrupt void Timer_B (void)
> > > > {
> > > > ...
> > > > }
> > > You need to clear the IFG of TA1 even if other shared
interrupts are
> > > not used at all. But it is best to use TBIV which will
automatically
> > > clear the pending IFG.
> > > See User's Guide for details.
> > >
> > > --- In m...@yahoogroups.com, "nissetest" wrote:
> > > >
> > > >
> > > > Hello,
> > > >
> > > > I am a newbie at the MSP430 and I'm having a lot of trouble
finding
> > > > neccesary information in the datasheets.
> > > >
> > > > My problem is that I cannot get the TB1 output to work as an
> UART TXD
> > > > output. Does anyone know why? Are the TB0 and TB1 different?
I
> Do not
> > > > find any information about this. I need to get a UART TXD
output on
> > > > P4.1/TB1, it works fine on P4.0/TB0 but not on P4.1/TB1. Any
> idea why?
> > > >
> > > > I am using a MSP430F1611 in a MSP-TS430PM64, MSP-FET430UIF +
IAR
> C/C++
> > > > Compiler for MSP430 V4.11A/W32 [Kickstart] (4.11.1.3).
> > > >
> > > > // --- This works (Set_DCO omitted) ---
> > > >
> > > > #define RXD 0x04 // RXD on P2.2
> > > > #define TXDB 0x01 // TXD on P4.0
> > > >
> > > > // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
> > > >
> > > > #define Bitime_5 104 // ~ 0.5 bit
length
> > > > #define Bitime 208 // ~ 9615 baud
> > > > #define DELTA 488 // Target DCO =
> > DELTA*(4096)
> > > > ~2MHz
> > > >
> > > > unsigned int RXTXData;
> > > > unsigned char BitCnt;
> > > >
> > > > void TX_Byte (void);
> > > > void RX_Ready (void);
> > > > void Set_DCO (void);
> > > >
> > > > // M. Buccini
> > > > // Texas Instruments Inc.
> > > > // Feb 2005
> > > > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench
> Version:
> > > > 3.21A
> > > >
> > >
> >
> //******************************************************************
****\
> > > > *******
> > > >
> > > > #include
> > > >
> > > >
> > > > void main (void)
> > > > {
> > > > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
timer
> > > >
> > > > BCSCTL1 |= DIVA_3; // ACLK =
LFXT1CLK/8
> > > > Set_DCO(); // Set DCO
> > > >
> > > > TBCCTL0 = OUT;
> > > > TACTL = TASSEL_2 + MC_2; // SMCLK,
> continuous mode
> > > > TBCTL = TASSEL_2 + MC_2; // SMCLK,
> continuous mode
> > > > P4SEL = TXDB; // *
> > > > P4DIR = TXDB; // *
> > > > P2SEL = RXD; // P2.2/TA0 as
RXD
> input
> > > >
> > > > // Mainloop
> > > > for (;;)
> > > > {
> > > > RX_Ready(); // UART ready to
RX one
> > > Byte
> > > > _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/
interr
> > > > until char RXed
> > > > TX_Byte(); // TX Back RXed
Byte
> > > > Received
> > > > }
> > > > }
> > > >
> > > >
> > > > // Function Transmits Character from RXTXData Buffer
> > > > void TX_Byte (void)
> > > > {
> > > > BitCnt = 0xA; // Load Bit
counter,
> > > 8data +
> > > > ST/SP
> > > > TBCCR0 = TBR; //*
> > > > TBCCR0 += Bitime; //*
> > > > RXTXData |= 0x100; // Add mark stop
bit to
> > > > RXTXData
> > > > RXTXData = RXTXData << 1; // Add space
start bit
> > > > TBCCTL0 = OUTMOD0 + CCIE; //*
> > > > while (TBCCTL0 & CCIE); // Wait for TX
> completion
> > > > }
> > > >
> > > >
> > > > // Function Readies UART to Receive Character into RXTXData
Buffer
> > > > // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> > > > void RX_Ready (void)
> > > > {
> > > > BitCnt = 0x8; // Load Bit
counter
> > > > CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge,
Cap
> > > > TBCCTL0 &= ~CCIE;
> > > > }
> > > >
> > > > // Timer A0 interrupt service routine
> > > > #pragma vector=TIMERA0_VECTOR
> > > > __interrupt void Timer_A (void)
> > > > {
> > > > CCR0 += Bitime; // Add Offset to
CCR0
> > > >
> > > > if( CCTL0 & CAP ) // Capture mode =
> start bit
> > > > edge
> > > > {
> > > > CCTL0 &= ~ CAP; // Switch from
> capture to
> > > > compare mode
> > > > CCR0 += Bitime_5;
> > > > _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins
on after
> > > reti
> > > > }
> > > > else
> > > > {
> > > > RXTXData = RXTXData >> 1;
> > > > if (CCTL0 & SCCI) // Get bit waiting
in
> > receive
> > > > latch
> > > > RXTXData |= 0x80;
> > > > BitCnt --; // All bits RXed?
> > > > if ( BitCnt == 0)
> > > > //>>>>>>>>>> Decode of Received Byte Here
> > > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > > {
> > > > CCTL0 &= ~ CCIE; // All bits RXed,
> disable
> > > > interrupt
> > > > _BIC_SR_IRQ(LPM3_bits); // Clear LPM3
bits from
> > > > 0(SR)
> > > > }
> > > > //>>>>>>>>>> Decode of Received Byte Here
> > > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > > }
> > > > }
> > > >
> > > > // Timer B interrupt service routine
> > > > #pragma vector=TIMERB0_VECTOR
> > > > __interrupt void Timer_B (void)
> > > > {
> > > > TBCCR0 += Bitime; // Add Offset
to CCR0
> > > >
> > > > if ( BitCnt == 0)
> > > > TBCCTL0 &= ~ CCIE; // All bits
TXed,
> > disable
> > > > interrupt
> > > > else
> > > > {
> > > > TBCCTL0 |= OUTMOD2; // TX Space
> > > > if (RXTXData & 0x01)
> > > > TBCCTL0 &= ~ OUTMOD2; // TX Mark
> > > > RXTXData = RXTXData >> 1;
> > > > BitCnt --;
> > > > }
> > > > }
> > > >
> > > >
> > > > // --- Does not work when output is moved to P4.1/TB1 (Set_DCO
> > omitted)
> > > > ---
> > > >
> > > >
> > > >
> > > > #define RXD 0x04 // RXD on P2.2
> > > > #define TXDB 0x02 // TXD on P4.1
> > > >
> > > > // Conditions for 9600 Baud SW UART, DCO ~ 2MHz
> > > >
> > > > #define Bitime_5 104 // ~ 0.5 bit
length
> > > > #define Bitime 208 // ~ 9615 baud
> > > > #define DELTA 488 // Target DCO =
> > DELTA*(4096)
> > > > ~2MHz
> > > >
> > > > unsigned int RXTXData;
> > > > unsigned char BitCnt;
> > > >
> > > > void TX_Byte (void);
> > > > void RX_Ready (void);
> > > > void Set_DCO (void);
> > > >
> > > > // M. Buccini
> > > > // Texas Instruments Inc.
> > > > // Feb 2005
> > > > // Built with CCE Version: 3.2.0 and IAR Embedded Workbench
> Version:
> > > > 3.21A
> > > >
> > >
> >
> //******************************************************************
****\
> > > > *******
> > > >
> > > > #include
> > > >
> > > >
> > > > void main (void)
> > > > {
> > > > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog
timer
> > > >
> > > > BCSCTL1 |= DIVA_3; // ACLK =
LFXT1CLK/8
> > > > Set_DCO(); // Set DCO
> > > >
> > > > TBCCTL1 = OUT;
> > > > TACTL = TASSEL_2 + MC_2; // SMCLK,
> continuous mode
> > > > TBCTL = TASSEL_2 + MC_2; // SMCLK,
> continuous mode
> > > > P4SEL = TXDB; // *
> > > > P4DIR = TXDB; // *
> > > > P2SEL = RXD; // P2.2/TA0 as
RXD
> input
> > > >
> > > > // Mainloop
> > > > for (;;)
> > > > {
> > > > RX_Ready(); // UART ready to
RX one
> > > Byte
> > > > _BIS_SR(LPM3_bits + GIE); // Enter LPM3 w/
interr
> > > > until char RXed
> > > > TX_Byte(); // TX Back RXed
Byte
> > > > Received
> > > > }
> > > > }
> > > >
> > > > // Function Transmits Character from RXTXData Buffer
> > > > void TX_Byte (void)
> > > > {
> > > > BitCnt = 0xA; // Load Bit
counter,
> > > 8data +
> > > > ST/SP
> > > > TBCCR1 = TBR; //*
> > > > TBCCR1 += Bitime; //*
> > > > RXTXData |= 0x100; // Add mark stop
bit to
> > > > RXTXData
> > > > RXTXData = RXTXData << 1; // Add space
start bit
> > > > TBCCTL1 = OUTMOD0 + CCIE; //*
> > > > while (TBCCTL1 & CCIE); // Wait for TX
> completion
> > > > }
> > > >
> > > >
> > > > // Function Readies UART to Receive Character into RXTXData
Buffer
> > > > // Sync capture not possible as DCO=TACLK=SMCLK can be off !!
> > > > void RX_Ready (void)
> > > > {
> > > > BitCnt = 0x8; // Load Bit
counter
> > > > CCTL0 = CM1 + CCIS0 + OUTMOD0 + CAP + CCIE; // Neg Edge,
Cap
> > > > TBCCTL1 &= ~CCIE;
> > > > }
> > > >
> > > > // Timer A0 interrupt service routine
> > > > #pragma vector=TIMERA0_VECTOR
> > > > __interrupt void Timer_A (void)
> > > > {
> > > > CCR0 += Bitime; // Add Offset to
CCR0
> > > >
> > > > if( CCTL0 & CAP ) // Capture mode =
> start bit
> > > > edge
> > > > {
> > > > CCTL0 &= ~ CAP; // Switch from
> capture to
> > > > compare mode
> > > > CCR0 += Bitime_5;
> > > > _BIC_SR_IRQ(SCG1 + SCG0); // DCO reamins
on after
> > > reti
> > > > }
> > > > else
> > > > {
> > > > RXTXData = RXTXData >> 1;
> > > > if (CCTL0 & SCCI) // Get bit waiting
in
> > receive
> > > > latch
> > > > RXTXData |= 0x80;
> > > > BitCnt --; // All bits RXed?
> > > > if ( BitCnt == 0)
> > > > //>>>>>>>>>> Decode of Received Byte Here
> > > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > > {
> > > > CCTL0 &= ~ CCIE; // All bits RXed,
> disable
> > > > interrupt
> > > > _BIC_SR_IRQ(LPM3_bits); // Clear LPM3
bits from
> > > > 0(SR)
> > > > }
> > > > //>>>>>>>>>> Decode of Received Byte Here
> > > > <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
> > > > }
> > > > }
> > > >
> > > > // Timer B interrupt service routine
> > > > #pragma vector=TIMERB1_VECTOR
> > > > __interrupt void Timer_B (void)
> > > > {
> > > > TBCCR1 += Bitime; // Add Offset
to CCR0
> > > >
> > > > if ( BitCnt == 0)
> > > > TBCCTL1 &= ~ CCIE; // All bits
TXed,
> > disable
> > > > interrupt
> > > > else
> > > > {
> > > > TBCCTL1 |= OUTMOD2; // TX Space
> > > > if (RXTXData & 0x01)
> > > > TBCCTL1 &= ~ OUTMOD2; // TX Mark
> > > > RXTXData = RXTXData >> 1;
> > > > BitCnt --;
> > > > }
> > > > }
> > > >
> > > > Regards,
> > > > Nisse
> > > >
> > > >
> > > >
> > > > [Non-text portions of this message have been removed]
> > > >
> > >
>
------------------------------------

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