Hello everybody,

I'm using a F169 and MAX127 (ADC) on I2C bus.

I have to do this:

After receiving the acknowledge, the slave issues the second byte followed by a NOT acknowledge (NACK) from the master to indicate that the last data byte has been received. Finally, the master issues
a STOP condition, ending the read cycle.

I don't know how to generate a NACK.
I've got several other I2C slaves on the bus - everything works fine.

I found this for USCI-I2C -> UCTXNACK generates a NACK.

But F169 is using UART and not USCI, so I need something like this for UART-I2C.

Thanks for your time.

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