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Layout recomendations and tips for best performance against EMC

Dr. Maykel AlonsoJanuary 4, 2013

When making the layout of the circuit diagram, it is interesting to perform a preliminary analysis of several issues in order to minimize problems arising from electromagnetic compatibility.The analysis consists in:

Identify / Analyze components: This section will analyze the integrated components, as well as any recommendations it may have the manufacturer. We must also analyze the encapsulation possibilities which have the component.

Identify / Analyze feeds: This section is important because power supplies are usually a junction of different circuits typically operate at different frequencies. So here it is important to have a good isolation of the power suplies of the circuits which operates at different frecuencies.

Identify / Analyze Inputs / Outputs: In this section is interesting to identify the different inputs / outputs that may exist in a circuit. These inputs and outputs are a critical point because usually they are combined with cables and these are more vulnerable to noise.

Identify / Analyze signals for each line: It's interesting analysis of each signal that is on each line, and classify these signals as digital / analog signal level and frequency that carries.


After performing these analyzes, it would be interesting to perform the following layout design methodology. Here there is an example of same:

  1. Encapsulation Choice: After making the preliminary analysis of the components. The next step it is the procedure to the election of the encapsulation:
    1. SHAPE: The ideal encapsulation is the circular one but in general it does not exist, so the best package is the one with the pins more equidistant from the center, square it is usually the best encapsulation shape.
    2. SIZE: The size the smaller is better.
    3. SOURCE / GROUND: It is better to choose encapsulations with pins SOURCE / GROUND focused as possible, or as close to the center of the integrated circuit.
    4. SURFACE MOUNT: When choosing the components if  possible chose surface mount components.
  2. Choice of PCB (Printed Circuit Board): The choice of the PCB begins with the choice of the PCB material. In general for the conductive traces the material it is copper, and for the case of the dielectric there are different types. One of the most common PCB-s is the FR-4 (Glass Reinforced Epoxy). The final choice is usually conditioned to the requirements imposed by customer, for example the size or location of the circuit. If you could choose, the best it is to choose at least one of 4-layer FR4 PCB. With the layets defined as follows:
    1. TOP / BOTTOM: For trace routing
    2. INTERMEDIATES:

i.      GROUND Plane: It's interesting to have a ground plane (GND) to reduce the effects of common mode coupling. In some cases it is also interesting to divide into different ground planes, to achieve a higher insulation, for example with the use of optical isolators. There are also cases in which the GROUND plane is made grooves for controlling the return path of the current.

ii.      POWER SUPLY plane

  1. Component Placement: When placing the components it should be consider to center them as much as possible providing a ground plane under them. This is because as it is not an infinite ground plane it appears an effect with the return currents which can be very large in some cases. Also it is interesting the separation of sensitive components, taking into account the length of the lines joining them are not too long. Finally it is interesting to place the integrated circuits away from supply circuits.
  2. Placement of lines / tracks: The size and maximum length of the tracks will be defined by the transmitted signal. When placing the tracks it is interesting place lines away as possible from each other and if it is possible introduce a GROUND plane between them. Also it is interesting to place the tracks as close as posible to the current return possible, therefore the ground plane should be the closest to routing tracks layer. Another interesting tip is the location of the connectors (typically are in the edge), taking into account that the distance from the conected integrated circuit it is the smallest possible in order to prevent the entry of noises. Finally the last recomendation it is interesting to keep away the most critical lines from crystal oscillators, which it is one of the typical noise source for the circuits, to avoid introducing noise into them.
  3. Via placement: For the placement of the vias we must have in mind the following considerations:
    1. Put the tracks as close as possible to integrated circuits

                                                              i.     As close as possible to GROUND pin (in the case of having GROUND plane)

                                                            ii.     As close as possible to POWER SUPPLY pin (in the case of having power supply plane)

    1. The maximum distance between the vias should not be greater than λ/20 of the highest frequency of the circuit
    2. The unused parts join them to the GROUND plane.

These are all the recommendations and tips I could give you. If you know any more, please comment it and I will try to add it...

 



Memfault Beyond the Launch

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