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Discussion Groups
Interrupts
Comp.Arch.Embedded is a worldwide Usenet news group that is used to discuss various aspects of Embedded Systems development.
We found 703 threads matching "interrupts"
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Re: Multiple UARTs and multiple interrupts
Gary Kato - 18:12 01-07-04
I'm not sure you want to disable interrupts within the UART ISR itself. It has
no bearing on the possible interference between the ISR and your regular code.
You are not allowing for any higher priority interrupts to happen. Granted, the
amount of time that interrupts are off in the ISR is small,...
"signaling" interrupts in WinCE 5.0
Roberto Waltman - 14:06 07-10-07
I am porting a touch-panel driver to a WinCE 5.0 device.
It is interrupt driven, using the SYSINTER_TOUCH &
SYSINTR_TOUCH_CHANGED interrupts.
To debug it, I need to simulate these interrupts from a timer thread,
either on the driver itself or from an application.
How do I do that?
Some...Re: UARTs and interrupts
Neil Kurzman - 00:26 18-05-05
Frieder Ferlemann wrote:
> Neil Kurzman schrieb:
> > I did not quite get a yes or no. I am using this on a PIC and 8051.
> > The Keil C example had interrupt disabled, so I did not look at it in detail. I will
> > look to see if it can be done.
> > I an not a big fan of disabled...voltage threshold for interrupts
Lin Gu - 19:34 11-01-04
Hi,
I am designing a module where low voltage threshold for interrupts
are desirable. A high of 0.5V and low of 0.2V are ideal but I am not sure
if current interrupt hardware can distinguish this kind of subtle
difference.I would appreciate it if anybody could tell me whether this is
possible...One of the 200 interrupts does not get executed sometimes due to a single statement
karthikbg - 08:36 14-12-06
Hi,
1) I have 200 interrupts and the corresponding Interrupt service
routines for those.
ISR ()
{
If (INTERRUPT_FLAG == 1)
DO_ISR_ACTIVITY
INTERRUPT_FLAG = 0;
}
When i am doing the 'INTERRUPT_FLAG=0' in the above code, One of the
interrupt gets fired, but not handled a...Re: pic18f452 interrupts
Donald - 09:29 05-10-07
vijayguru wrote:
> how to handle 4 interrupts in pic18f452 out four interrupts 2 are low
> interrupts and other two are high but we are having only two vector
> address plz suggest me anybody
>
>
Welcome to the wonderful world of PIC.
In the interrupt routine, you need to check which...Nesting interrupts in 8051
02:33 21-02-06
If the 8051chip is servicing a lower priority interrupt and I want it
to be interrupted by a higher priority interrupt, do I have to enable
interrupts - EA = 1 - as sson as I enter lower priority ISR. In other
words, does the 8051 disables all interrupts when it enters an ISR ?
...Re: How to save HC08's interrupt state to the stack without using register?
Dave Hansen - 16:32 05-03-04
On 05 Mar 2004 18:50:42 GMT, cbarn24050@aol.com (CBarn24050) wrote:
> that should not happen anyway.
Are you being obtuse, or do you really not know?
Consider routines to insert and remove data from queues. In a
particular application, these routines might be used to communicate
between ...How to write an ISR in UCOS-ii
Prakhar - 06:09 02-10-07
Hello,
I am developing a program which creates many tasks, schedules them and
responds to external interrupts, when they ouccr.
In my program in UCOS-ii, I have enabled the external interrupts (the
values of the resgisters are set correspondingly).
Now, I want to write the interrupts handler ...Masking/Disabling/Missing interrupts
joshc - 22:02 09-06-07
I know this is implementation specific but to make it a little less
ambiguous let's deal with an XScale or any ARM core for that matter.
Under what conditions would you _miss_ interrupts? Let's say I have a
UART that only generates one interrupt to the interrupt controller but
the source of this...Debugging by bsing SW interrupts instead of HW interrupts
07:12 18-08-05
My problem is to test my driver software ,but the asic chip is not
ready yet.I can simulate the registers of the asic easyly,but the
HW interrupts which will be generated by asic chip is necessary to
test my interrupt handler and interrupt driven SW.
For X86 processor I know that also SW interr...Rising/Falling edge Interrupts and non-maskable interrupt
galapogos - 22:05 17-12-06
Hi,
I'm working with an MCU that has 4 interrupts on external PINs, and I
wish to interrupt on an active low input. However, 3 of the interrupts
are active high interrupt while the last one, though it's an active low
interrupt, is also labelled a non-maskable interrupt. I want to be able
to mas...software & hardware interrupts
ishita - 12:52 04-09-06
Hi all,
I want to know exact difference between software interrupts and
hardware interrupts.
I also want to know whether timer interrupt in 8051 is a software
interrupt or a hardware interrupt.
Best regards,
Ishita
...Re: How to generate delay of 360ns for an embedded application using c
Paul Burke - 04:51 03-12-04
Ravi kumar.N wrote:
> Respected Respects,
No one respects ME and gets away with it!
>
> I want to generate a delay of 360ns between this writing and
> reading operation. I want this function to be written in c.What logic
> has to be used.
Less than, more than, exactly equal to...Help with interrupts please
panfilero - 22:37 23-03-07
Hello
I'm having a heck of a time trying to get interrupts to work on my
MCU. All my coding is in C, and basically I want to jump to an isr
whenever I sense something in my serial port. So I wrote a function
like this:
interrupt 20 void isr(void) {....}
the function just spits out some...Re: Advanced Transdata
Thad Smith - 15:04 28-05-05
Bill Chernoff wrote:
> I am using a Rice17A to emulate a PIC18C252. Having a lot of fun trying to
> debug 2 timer-overflow based interrupts.
...
> I think my
> problem lies somewhere in the interrupts the way they save context, and then
> restore it and continue on.
One place to c...Re: dsPIC33F programming
Jonny Barker - 15:49 15-07-07
linnix wrote:
> "The interrupt Vector Table (IVT) resides in program memory starting
> at 0x000004.
> The IVT contains 126 vectors ..."
A fair point, although if no interrupts are used, won't they just act like
program memory? The AVRs I've played with with allow you to ignore the IVT
com...AT91RM9200: PIO: im getting two interrupts when i press the switch once :-(
Mayank Kaushik - 07:37 10-01-05
Hi,
im learning how to use the AT91RM9200..right now im trying to tackle
the AIC. iv set everyhting up, earmarking PIOA0 for an external
interrupt through a switch connected to it, so that theoretically
whenever the switch is pressed, an interrupt is generated that sends a
string via the debu...Re: External Interrupts on an MPC555 with Quickstart Software
Gary Schnabl - 20:29 15-03-05
"mpcuser" wrote in message
news:173a592f.0503141433.1039e4fa@posting.google.com...
> Hello,
> I'm using the MPC500 quickstart libraries, but I'm having trouble
> using external interrupts. My board is a PB-0555 manufactured by
> Axiom, and I'm using Codewarrior. I'm using the following...Re: Cypress EZ-USB help
RileyDeWiley - 14:22 23-01-08
I'm new here, but this looks like a bug to me (it's in a sample not a
library):
void TD_Init(void) // Called once at startup
{
// Enable the SOF and USB Reset interrupts
USBIEN |= bmSOF + bmURES;
// Enable the ISO IN endpoints
INISOVAL = bmEP8;
// Set up the addres...How interrrupts are handled (works) ? (internally)
visweswara - 23:11 08-11-06
Hi,
I have a fundamental question of how interrupts in uC/uPs actually
works? Many tell what happens when interrupts occur , like the program
flow changes from the main program to ISR. But how exactly this happens
without the interference of CPU?
What I understand is interrupt gets the atte...spurious timer overflow interrupt issue
msg - 16:09 14-02-07
Greetings:
I don't expect that current readers of this newsgroup will have direct
experience with this issue but I could be surprised :-) I will
appreciate related answers in any case.
I have a problem with software timer interrupt status on the i8096;
's/w timer 0' interrupts are replaced..."asm volatile" and GCC
Graeme Prentice - 06:52 22-03-04
Using G++ (i.e. C++) for a Hitachi H8S micro, if we have inline
functions to enable and disable interrupts using asm volatile like this
inline void EnableInterrupts(void) {
asm volatile("andc #0x3f,ccr" : : : "cc", "memory" );
}
inline void DisableInterrupts(void) {
asm volatile("o...Re: question: interrupt nesting
Meindert Sprang - 05:06 14-01-04
"Enrico Migliore" wrote in message
news:40050E84.FE00D9BB@foskeea.org...
> hi folks,
>
> I'm experiencing some problems on a Renesas M32C:
>
> it seems that a higher priority interrupt can't interrupt
> a lower priority one.
> To be honest, the datasheet doesn't anything about
...C 'desktop' programmer needs advice on how to code embedded C on a micro controller.
Roger Walker - 14:04 06-04-07
Hi Group,
Intro
I've been programming for a long time (to long to mention!), but 99%
of my programming has been for 'desktop' PCs under DOS and UNIX using
C. I've rarely had to worry about interrupts, watchdogs etc. Well now
I have to! The target will be a Radio with an 8-bit NEC Micro
cont...Re: Mapping the PGN with ID register
Charan - 23:47 19-01-06
Thanks for all, now i am engaged in writing the interrupt routine for
CAN transmission and reception. plz give some suggestion on how to
initialize the interrupt routine? how to use them in the transmission
and reception?. is there any steps to be followed for Interrupts. how
can i utilize Las...Atmel At90USB (AVR with USB) Enumeration
Stefan Salewski - 14:05 28-06-06
In Datasheet for AT90USB1287 (7593C–AVR–05/06 Preliminary)
we can read on page 274 (22. USB Device Operating modes):
"CONTROL endpoints should not be managed by interrupts, but only by polling
the status bits."
Can someone tell me why I should not use interrupts for handling enumeration
...Interrupts and Analog Devices ADuC842
Walter Smits - 20:19 04-10-04
Hi,
We are experiencing some issues with external interrupts resetting an
Analog Devices ADuC842 controller (8051 family). The system we are
working on analyses sensorial data from a rotary encoder connected to
EX0. The interrupt is configured to be level-triggering. In our
current set...Re: Newbie - TIMERS
David Brown - 08:13 15-06-05
vuchan@gmail.com wrote:
> Hello,
>
> I'm quite lost with the configuration of the timers reload.
>
> For example: my 8051 is working at 6MHZ, and I want an interruption on
> the timer0 each 1 ms, How should I configure TH0 and TL0?
>
> And please, explain me how must be calculated...Polling vs. Interrupts in counting pulses - what is better?
ElderUberGeek - 04:06 19-01-06
Hi. When counting pulses using a microcontroller (say from an encoder
or pulse generator), there are two methods: polling and using
interrupts. Two alternative designs can be used (well, at least), one
is to have the Microcontroller do it directly, and the other is to use
a dedicated chip to do ...How does Intel's VTune works?
03:47 08-08-06
I need to optimize a program on Intel's XScale, so I use VTune to
find the hot spot. I use
sampling to locate the hot spot.
At first, the functions lists according to its used time
Function
A
B
C
D
E
But after I have written assembly source for A, and run VTune again,
but the result...Re: question about ARM
Peter Dickerson - 02:46 26-05-08
"Walter Banks" wrote in message
news:4839E84F.3E4C4987@bytecraft.com...
>
>
> Eric Smith wrote:
>
> > FreeRTOS.org wrote:
> > > The Cotex-M3 is designed from the ground up to be an embedded core and
> > > includes features that make it very easy to support using an RTOS.
> >
...DJGPP + backplane + PCI + interrupts
Slavisa Zigic - 17:34 27-12-07
We are trying to use PCI backplane with multiple PCI cards including USB
card. The embedded processor is X86 with DOS and 32 bit extension
(DPMI). The PCI cards are producing shared interrupts and we are having
problems of different types, which we suspect are either in our driver
software or ...Re: interrupt question
Tim Wescott - 12:07 13-10-06
John wrote:
> If CPU is servicing a pin 5 interrupt in ISR, and there is another
> interrupt pin 3 (with higher priority) comes in. Will CPU stops
> servicing a pin 5 interrupt and handles interrupt pin 3 first? Or it
> will wait until pin 5 ISR is done?
>
> please advice. thanks...
...AVR-gnuC interrupt handler question
Fred Bartoli - 15:53 04-09-06
Hello,
I'm definitely not a C programmer so the answer is probably obvious, but
anyway here is my question:
I've a small 4x2 keyboard that's handled through interrupts.
Each of the 2 columns is connected to an IT input (resp. INT0 & INT1)
I want to serve both interrupts through the same hand...Re: elimination of intercharacter gap in RS232 stream?
Ted - 13:05 10-10-07
On 10 Oct, 17:50, "Bo" wrote:
> Writing an Embbeded Linux app for a PC104/Versalogic board. Linux 2.6.14.17.
>
> Using write() to transmit data packets to another PC104 board. If I write()
> 30 bytes, sometimes there is a 2-5mS gap in the middle of the
> transmission, usually at about b...IRQ handling on ARM processor (StrongARM)
20:30 07-05-06
Hi, I try to handle some interrupts on my Yopy (Strongarm processor),
in particular keyboard interrupts.
So, IRQ vector table is at 0x00000018 but I can't write any value at
these address in monitor mode (i.e. without linux, without any OS).
I have written my IRQ handler but I can't tell the m...Re: definition of "atomic"
CBFalconer - 17:55 15-09-06
langwadt@ieee.org wrote:
> martin griffith wrote:
>
> > Nope, not home work
> >
> > I'm still a newbie (forever), and I seen "atomic" mentioned in a few
> > threads recently
> > I've done a quick search on keil and wikipedia.
> >
> > Anyone got a simple definition ( of atomic)?
>...M32C Port 9 DDR unlocking
John G - 08:19 29-01-05
I am using the M32C/83 and bit banging I2C out on port 9. Port 9 requires
the data direction register to be unlocked via PRCR before writing to PD9.
Occasionally, PD9 isn't getting set and one of my I2C pins does not go low
when it should. Bad things happen after that.
The H/W manual stat...Re: Embedded Linux = RTOS ??
Scott Moore - 12:26 21-06-04
Sagaert Johan wrote:
> Can someone give an answer on this?
>
> Many vendors claim that their boards run embedded linux, but is this a real
> RTOS or a stripped down version of the full version ?
>
> Johan
>
>
True, Linux != RTOS. However, you can make the point moot. If you ...