I'm considering a project here where I'll need a reasonable amount
of storage in an otherwise "small" system.  The spec hasn't been
firmed up yet but I imagine we're looking at a 16 bitter CPU,
probably a PIC18 or an MSP430.  "Reasonable" storage in this context
means no more than 100MB.  Volatility isn't a problem but the
rewrite cycles are such I'd be wary of flash storage, so I'm finding
myself drawn towards a RAM disk - i.e. not directly addressable
memory but something that can be accessed after the requisite port
set up.

Looking at memories the pricing of commodity DDR2/3 DIMMs are
certainly very attractive but I'm a little hesitant over the
interfacing requirements - I'm used to operating at a few tens of
MHz, no more than double-sided PCBs and I know next to nothing of
transmission lines.  Can these memories be underclocked to that
extent and still behave nicely, or does anyone have other insights?

-- 
Andrew Smallshaw
a...@sdf.lonestar.org

On 07/07/2012 08:20 PM, Andrew Smallshaw wrote:
> I'm considering a project here where I'll need a reasonable amount
> of storage in an otherwise "small" system.  The spec hasn't been
> firmed up yet but I imagine we're looking at a 16 bitter CPU,
> probably a PIC18 or an MSP430.  "Reasonable" storage in this context
> means no more than 100MB.  Volatility isn't a problem but the
> rewrite cycles are such I'd be wary of flash storage, so I'm finding
> myself drawn towards a RAM disk - i.e. not directly addressable
> memory but something that can be accessed after the requisite port
> set up.
>
> Looking at memories the pricing of commodity DDR2/3 DIMMs are
> certainly very attractive but I'm a little hesitant over the
> interfacing requirements - I'm used to operating at a few tens of
> MHz, no more than double-sided PCBs and I know next to nothing of
> transmission lines.  Can these memories be underclocked to that
> extent and still behave nicely, or does anyone have other insights?
>

DDR has a pretty high minimum clock rate, unfortunately. Regular SDRAM 
does not, but you still have to maintain a sufficient refresh rate.

How about using a CPU with integrated DDR interface  ?

On 07/07/2012 08:30 PM, Arlet Ottens wrote:

>> Looking at memories the pricing of commodity DDR2/3 DIMMs are
>> certainly very attractive but I'm a little hesitant over the
>> interfacing requirements - I'm used to operating at a few tens of
>> MHz, no more than double-sided PCBs and I know next to nothing of
>> transmission lines. Can these memories be underclocked to that
>> extent and still behave nicely, or does anyone have other insights?
>>
>
> DDR has a pretty high minimum clock rate, unfortunately. Regular SDRAM
> does not, but you still have to maintain a sufficient refresh rate.
>
> How about using a CPU with integrated DDR interface ?

Duh. An integrated DDR interface still requires high speed PCB design.

How about using an off-the-shelf processor module with memory included ?

Andrew Smallshaw wrote:
> I'm considering a project here where I'll need a reasonable amount
> of storage in an otherwise "small" system.  The spec hasn't been
> firmed up yet but I imagine we're looking at a 16 bitter CPU,
> probably a PIC18 or an MSP430.  "Reasonable" storage in this context
> means no more than 100MB.  Volatility isn't a problem but the
> rewrite cycles are such I'd be wary of flash storage, so I'm finding
> myself drawn towards a RAM disk - i.e. not directly addressable
> memory but something that can be accessed after the requisite port
> set up.
>
> Looking at memories the pricing of commodity DDR2/3 DIMMs are
> certainly very attractive but I'm a little hesitant over the
> interfacing requirements - I'm used to operating at a few tens of
> MHz, no more than double-sided PCBs and I know next to nothing of
> transmission lines.  Can these memories be underclocked to that
> extent and still behave nicely, or does anyone have other insights?
>


You'll need a dedicated controller to interface to DDR. What you
can or can't do depends on what's available for the processor you
choose.

SFAIK, you'll then want to use DDR as main memory, not as an
expansion store.

Base your design on the eval board for that processor, including
the BSP for the eval board. You'll need to spend some time testing
access to DDR.

--
Les Cargill

On Sat, 07 Jul 2012 18:20:57 +0000, Andrew Smallshaw wrote:

> I'm considering a project here where I'll need a reasonable amount of
> storage in an otherwise "small" system.  The spec hasn't been firmed up
> yet but I imagine we're looking at a 16 bitter CPU, probably a PIC18 or
> an MSP430.  "Reasonable" storage in this context means no more than
> 100MB.  Volatility isn't a problem but the rewrite cycles are such I'd
> be wary of flash storage, so I'm finding myself drawn towards a RAM disk
> - i.e. not directly addressable memory but something that can be
> accessed after the requisite port set up.
> 
> Looking at memories the pricing of commodity DDR2/3 DIMMs are certainly
> very attractive but I'm a little hesitant over the interfacing
> requirements - I'm used to operating at a few tens of MHz, no more than
> double-sided PCBs and I know next to nothing of transmission lines.  Can
> these memories be underclocked to that extent and still behave nicely,
> or does anyone have other insights?

DDR needs a lot of care and feeding, and because it's dynamic RAM it 
forgets what you tell it if you don't refresh it often enough.  This 
means that you _do_ have a minimum clock speed that you can't go below, 
and that clock speed is going to be a pretty significant fraction of the 
highest permissible.

I don't have a clue if it's even available, but if you can find just 
about any kind of static RAM that should be much easier.

If you can't, you may find that the cheapest available DDR controller 
comes attached to some flavor of 32-bit processor.

-- 
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com

Den lördagen den 7:e juli 2012 kl. 20:20:57 UTC+2 skrev Andrew Smallshaw:
> I'm considering a project here where I'll need a reasonable amount
> of storage in an otherwise "small" system.  The spec hasn't been
> firmed up yet but I imagine we're looking at a 16 bitter CPU,
> probably a PIC18 or an MSP430.  "Reasonable" storage in this context
> means no more than 100MB.  Volatility isn't a problem but the
> rewrite cycles are such I'd be wary of flash storage, so I'm finding
> myself drawn towards a RAM disk - i.e. not directly addressable
> memory but something that can be accessed after the requisite port
> set up.
> 
> Looking at memories the pricing of commodity DDR2/3 DIMMs are
> certainly very attractive but I'm a little hesitant over the
> interfacing requirements - I'm used to operating at a few tens of
> MHz, no more than double-sided PCBs and I know next to nothing of
> transmission lines.  Can these memories be underclocked to that
> extent and still behave nicely, or does anyone have other insights?
> 
> -- 
> Andrew Smallshaw
> a...@sdf.lonestar.org

Why not a SRAM 128k x 8  or 512k x 8 ?

On 2012-07-07, l...@gmail.com <l...@gmail.com> wrote:
> Den l?rdagen den 7:e juli 2012 kl. 20:20:57 UTC+2 skrev Andrew Smallshaw:
>> I'm considering a project here where I'll need a reasonable amount
>> of storage in an otherwise "small" system.  The spec hasn't been
>> firmed up yet but I imagine we're looking at a 16 bitter CPU,
>> probably a PIC18 or an MSP430.  "Reasonable" storage in this context
>> means no more than 100MB.  Volatility isn't a problem but the
>> rewrite cycles are such I'd be wary of flash storage, so I'm finding
>> myself drawn towards a RAM disk - i.e. not directly addressable
>> memory but something that can be accessed after the requisite port
>> set up.
>
> Why not a SRAM 128k x 8  or 512k x 8 ?

We'd be talking hundreds of chips to get the required capacity.
I think some off the shelf board is going to be the answer here
but I'll have to have a good look around for something that fits
the form factor - I'm constrained in width more than anything else.
The space available is approximately 10"x3"x1.5".

-- 
Andrew Smallshaw
a...@sdf.lonestar.org

On 7/7/2012 7:09 PM, Andrew Smallshaw wrote:
> On 2012-07-07, l...@gmail.com <l...@gmail.com> wrote:
>> Den l?rdagen den 7:e juli 2012 kl. 20:20:57 UTC+2 skrev Andrew Smallshaw:
>>> I'm considering a project here where I'll need a reasonable amount
>>> of storage in an otherwise "small" system.  The spec hasn't been
>>> firmed up yet but I imagine we're looking at a 16 bitter CPU,
>>> probably a PIC18 or an MSP430.  "Reasonable" storage in this context
>>> means no more than 100MB.  Volatility isn't a problem but the
>>> rewrite cycles are such I'd be wary of flash storage, so I'm finding
>>> myself drawn towards a RAM disk - i.e. not directly addressable
>>> memory but something that can be accessed after the requisite port
>>> set up.
>>
>> Why not a SRAM 128k x 8  or 512k x 8 ?
>
> We'd be talking hundreds of chips to get the required capacity.
> I think some off the shelf board is going to be the answer here
> but I'll have to have a good look around for something that fits
> the form factor - I'm constrained in width more than anything else.
> The space available is approximately 10"x3"x1.5".
>
A lot fewer of these:

http://www.digikey.com/product-detail/en/HM66AQB18202BP-50/HM66AQB18202BP-50-ND/1284352

No Price !!   If you have to ask......


http://media.digikey.com/pdf/Data%20Sheets/Renesas/HM66AQB36102,18202,9402.pdf


Memory Size	36M (2M x 18)

but:

Package / Case	165-LBGA

On Sat, 7 Jul 2012 18:20:57 +0000 (UTC), Andrew Smallshaw
<a...@sdf.lonestar.org> wrote:

>I'm considering a project here where I'll need a reasonable amount
>of storage in an otherwise "small" system.  The spec hasn't been
>firmed up yet but I imagine we're looking at a 16 bitter CPU,
>probably a PIC18 or an MSP430.  "Reasonable" storage in this context
>means no more than 100MB.  Volatility isn't a problem but the
>rewrite cycles are such I'd be wary of flash storage, so I'm finding
>myself drawn towards a RAM disk - i.e. not directly addressable
>memory but something that can be accessed after the requisite port
>set up.
>
>Looking at memories the pricing of commodity DDR2/3 DIMMs are
>certainly very attractive but I'm a little hesitant over the
>interfacing requirements - I'm used to operating at a few tens of
>MHz, no more than double-sided PCBs and I know next to nothing of
>transmission lines.  Can these memories be underclocked to that
>extent and still behave nicely, or does anyone have other insights?


There are a number of manufacturers of pseudo-static RAMs, which
basically do what you want - all the refresh and DRAM controller stuff
is built in, and there's a simpler system interface.  Micron makes
several semi-close to size range you're talking about (128Mb - note
mega*bits*), for example.  Winbond makes some 256Mb versions.  Try
searching for PSRAM or PSDRAM.

No personal experience with any of these.

On Sat, 7 Jul 2012 18:20:57 +0000 (UTC), Andrew Smallshaw
<a...@sdf.lonestar.org> wrote:

>I'm considering a project here where I'll need a reasonable amount
>of storage in an otherwise "small" system.  The spec hasn't been
>firmed up yet but I imagine we're looking at a 16 bitter CPU,
>probably a PIC18 or an MSP430.  "Reasonable" storage in this context
>means no more than 100MB.  Volatility isn't a problem but the
>rewrite cycles are such I'd be wary of flash storage, so I'm finding
>myself drawn towards a RAM disk - i.e. not directly addressable
>memory but something that can be accessed after the requisite port
>set up.
>
>Looking at memories the pricing of commodity DDR2/3 DIMMs are
>certainly very attractive but I'm a little hesitant over the
>interfacing requirements - I'm used to operating at a few tens of
>MHz, no more than double-sided PCBs and I know next to nothing of
>transmission lines.  Can these memories be underclocked to that
>extent and still behave nicely, or does anyone have other insights?

128 MiB would be 16 MiW (64 bit) requiring 24 address lines, thus 12
column lines and 12 row lines multiplexed together. 

At least older DRAMs will retain the data for several milliseconds
(depending on temperature), thus each column should be referenced
within that time frame. With 12 column address lines and 4096 columns,
a refresh frequency would be about 1-2 MHz to refresh all columns.

Refresh is only needed, if all column are not accessed within these
few milliseconds, any ordinary read access will refresh the whole
column. 

If a block oriented storage system is used with 4096x8 = 32 KiB pages,
By reordering the address lines before the address line multiplexor,
bytes 0..7 for each page would come from column 0, bits 8..15 from
column 1 and so on, thus a single page read will refresh the whole
memory. Thus, if there is a read access to any page within a
millisecond or two, no extra refresh would be needed.

This tricks was usable at least with traditional RAS/CAS DRAMs, I am
not sure if some DDR parameters would prohibit this.