Hi everybody.
I'm finishing my RM9200 board (32MB SDRAM, 2MB SPI NOR, Smart Media, 
RTL8201).
Now I need to choose te audio interface.
First - I was thinking about AC97 codec - like National's LM4549 because I 
saw this chip in some RM9000 SDK boards.
But I saw some posts with information that AT91RM9200 and its  SSC doesn't 
work with AC97 codec.
Can somebody confirm (or better not ;) ) this fact ?
So...  AT91RM9200 and audio interface - only one solution it is i2s codec ? 
Am I right ?

Best regards

-- 
Pelos
http://www.pelos.pl

Pelos wrote:
> Hi everybody.
> I'm finishing my RM9200 board (32MB SDRAM, 2MB SPI NOR, Smart Media,
> RTL8201).
> Now I need to choose te audio interface.
> First - I was thinking about AC97 codec - like National's LM4549
> because I saw this chip in some RM9000 SDK boards.
> But I saw some posts with information that AT91RM9200 and its  SSC
> doesn't work with AC97 codec.
> Can somebody confirm (or better not ;) ) this fact ?
> So...  AT91RM9200 and audio interface - only one solution it is i2s
> codec ? Am I right ?
>

The AC-97 runs at 20 MHz+ and  this speed is not supported by the 
AT91RM9200.
Think it tops out at MCK/4 = 15 Mhz.  Later chips have faster SSCs.
Also you need to run several timeslots, which is difficult to implement
even if you support the high speed.
The AC-97 peripheral used in the AVR32 AP7000 is now available for use in 
future AT91 chips.

The I2S based AT73C213 Audio DAC has been used with the AT91SAM9261.


> Best regards

-- 
Best Regards,
Ulf Samuelsson
u...@a-t-m-e-l.com
This message is intended to be my own personal view and it
may or may not be shared by my employer Atmel Nordic AB 

In comp.arch.embedded,
Ulf Samuelsson <u...@a-t-m-e-l.com> wrote:
>
> The AC-97 runs at 20 MHz+ and  this speed is not supported by the 
> AT91RM9200.
> Think it tops out at MCK/4 = 15 Mhz.  Later chips have faster SSCs.

The AT91RM9200 datasheet says MCK max is 80 MHz

-- 
Stef    (remove caps, dashes and .invalid from e-mail address to reply by mail)

Stef wrote:
> In comp.arch.embedded,
> Ulf Samuelsson <u...@a-t-m-e-l.com> wrote:
>>
>> The AC-97 runs at 20 MHz+ and  this speed is not supported by the
>> AT91RM9200.
>> Think it tops out at MCK/4 = 15 Mhz.  Later chips have faster SSCs.
>
> The AT91RM9200 datasheet says MCK max is 80 MHz

Yes, but the CPU PLL tops out at 180 MHz.
180 MHz/2 = 90 MHz, so this is illegal.
180 MHz/3 = 60 MHz and 60 Mhz / 4 = 15.

You can do PLL = 160 MHz and get MCLK = 80 MHz.
80 MHz / 4 = 20 MHz, but the real AC-97 clock is around 24 MHz IIRC.


-- 
Best Regards,
Ulf Samuelsson
u...@a-t-m-e-l.com
This message is intended to be my own personal view and it
may or may not be shared by my employer Atmel Nordic AB 

U¿ytkownik "Ulf Samuelsson" <u...@a-t-m-e-l.com> napisa³ w wiadomo¶ci 
news:e5luk6$3b3$1...@nntp.aioe.org...
> Stef wrote:
>> In comp.arch.embedded,
>> Ulf Samuelsson <u...@a-t-m-e-l.com> wrote:
>>>
>>> The AC-97 runs at 20 MHz+ and  this speed is not supported by the
>>> AT91RM9200.
>>> Think it tops out at MCK/4 = 15 Mhz.  Later chips have faster SSCs.
>>
>> The AT91RM9200 datasheet says MCK max is 80 MHz
>
> Yes, but the CPU PLL tops out at 180 MHz.
> 180 MHz/2 = 90 MHz, so this is illegal.
> 180 MHz/3 = 60 MHz and 60 Mhz / 4 = 15.
>
> You can do PLL = 160 MHz and get MCLK = 80 MHz.
> 80 MHz / 4 = 20 MHz, but the real AC-97 clock is around 24 MHz IIRC.

Ok guys.
Thanks for this explanation. Now everything is clear.
I have decided to choose something from TI family TLV320AIC2x

Best regards

-- 
Pelos
http://www.pelos.pl