Why does Endianness depend on Bit_order ?
Why Bit_order is always of Big Endian in a Byte irrespective of  the
Little Endian or Big Endian CPU design?

A really good question to ask.

It will tell whether the candidate is aware of the Endiannes,
Byte_Order, Bit_Order and Bit manipulations.

His explanations will give his view about the Dependencies and reasons
for Endianness
and marks for the following.

- Reasoning power
- Technical strength
- Analytical power
- Creativity

Regards,
Karthik Balaguru

karthikbg wrote:
> Why does Endianness depend on Bit_order ?
> Why Bit_order is always of Big Endian in a Byte irrespective of  the
> Little Endian or Big Endian CPU design?
>
> A really good question to ask.
>
> It will tell whether the candidate is aware of the Endiannes,
> Byte_Order, Bit_Order and Bit manipulations.
>
> His explanations will give his view about the Dependencies and reasons
> for Endianness
> and marks for the following.
>
> - Reasoning power
> - Technical strength
> - Analytical power
> - Creativity
>
> Regards,
> Karthik Balaguru

( Thx, got it from comp.arch.embedded recently):
Good  answer  :
endian-ness is not a function of the bits or the bytes, but of
the *addressing*.  Most machines can not address bits, so bits are not
part of endian-ness.  If a machine only addresses words and not bytes,
it does not *have* endian-ness in any regard.

Regards,
Karthik Balaguru

"Yuriy K." <y...@mail.ru> writes:
> Rainer Buchty wrote:

> > So if the *programmer* knows that "a" is either 0 or 1, why shouldn't he 
> > write "a^=1;" (or "a^=SOME_MASK;" for the arbitrary case) right from the 
> > beginning but rather if/then?
> 
> Because three years later new programmer will spend two hours trying to 
> figure out if *a* can or can not be equal to 2 or 3, and what is this 
> silly line meant to do.

Someone's education is severely lacking if they can't
determine that XORing a value with 1 is going to toggle
the LS bit each time.

> Unfortunately, a lot of "programmers" do not think about
> code clarity and maintainability.

About the only lack of clarity I see in the "a^=1;" example
is the lack of whitespace.

> More often than not it is more important than saving two
> bytes and 500 nanoseconds.

Ever work on an Internet message router fed by T3 lines?

SMS <s...@geemail.com> writes:
> larwe wrote:
> > Al  Borowski wrote:
> > 
> >> You've got me. If I was asked this in an interview I'd be stumped. What
> >> kind of non-seriously broken system could have z not being equal to
> >> three?
> > 
> > This response illustrates nicely that cute interview questions do not
> > select good employees, merely employees who know the answers to trick
> > questions.
> 
> Reminds me of the time I was asked to construct an XOR gate out of the 
> minimum number of NAND gates. It's not obvious, but I had happened to 
> have seen this trick a long time ago, so I got it right. It said nothing 
> of my qualifications for the job, just that the interviewer did not know 
> what kinds of questions to ask.

For those of us who haven't seen the answer, what is it?
Off the top of my head, I'd say that three gates are needed
but possibly only two with some gymnastics.

"Everett M. Greene" wrote:
> SMS <s...@geemail.com> writes:
>>
... snip ...
>>
>> Reminds me of the time I was asked to construct an XOR gate out
>> of the minimum number of NAND gates. It's not obvious, but I had
>> happened to have seen this trick a long time ago, so I got it
>> right. It said nothing of my qualifications for the job, just
>> that the interviewer did not know what kinds of questions to ask.
> 
> For those of us who haven't seen the answer, what is it?
> Off the top of my head, I'd say that three gates are needed
> but possibly only two with some gymnastics.

It depends on whether or not the inverses of the input signals are
available.  If so, and if the outputs can be wire-ored, you can get
away with two 2 input nands.  Without the inverses available you
will need a quad 2 in open collector nand package, two of which are
used as inverters.  No tricks involved.  Just look at the Karnaugh
map.

-- 
Chuck F (cbfalconer at maineline dot net)
   Available for consulting/temporary embedded and systems.
   <http://cbfalconer.home.att.net>;

CBFalconer wrote:

> "Everett M. Greene" wrote:
> > SMS <s...@geemail.com> writes:
> >>
> ... snip ...
> >>
> >> Reminds me of the time I was asked to construct an XOR gate out
> >> of the minimum number of NAND gates. It's not obvious, but I had
> >> happened to have seen this trick a long time ago, so I got it
> >> right. It said nothing of my qualifications for the job, just
> >> that the interviewer did not know what kinds of questions to ask.
> >
> > For those of us who haven't seen the answer, what is it?
> > Off the top of my head, I'd say that three gates are needed
> > but possibly only two with some gymnastics.
>
> It depends on whether or not the inverses of the input signals are
> available.  If so, and if the outputs can be wire-ored, you can get
> away with two 2 input nands.  Without the inverses available you
> will need a quad 2 in open collector nand package, two of which are
> used as inverters.  No tricks involved.  Just look at the Karnaugh
> map.

You can do it with regular nands as well.

xor(a,b) = nand{ nand(a,c) , nand(b,c) }

where c = nand(a,b)

Everett M. Greene wrote:

>>> So if the *programmer* knows that "a" is either 0 or 1, why shouldn't he 
>>> write "a^=1;" (or "a^=SOME_MASK;" for the arbitrary case) right from the 
>>> beginning but rather if/then?
>> Because three years later new programmer will spend two hours trying to 
>> figure out if *a* can or can not be equal to 2 or 3, and what is this 
>> silly line meant to do.
> 
> Someone's education is severely lacking if they can't
> determine that XORing a value with 1 is going to toggle
> the LS bit each time.

Of course it toggles LSB, but it does not tell anything about the rest 
of the 'a'.

Two pages down there will be if(a==1){do_smth}
How would he now that 'a' can not be equal to 2?

-- 
WBR, Yuriy.
"Resistance is futile"