<c...@hotmail.com> wrote in message 
news:1...@19g2000hsx.googlegroups.com...
> On Oct 3, 2:25 pm, Ray Andraka <r...@andraka.com> wrote:
>> cs_post...@hotmail.com wrote:
>> > You can control your degree of vendor lock in fairly easy - if you
>> > don't use their unique library functions, and use only the free
>> > download versions of the tools, and don't utilize any abuses of the
>> > language that one tool or the other might permit, then you should
>> > remain portable.
>>
>> ...and far less efficient than you could be if you designed to the
>> architecture.  Now that doesn't necessarily mean instantiating
>> primitives, but it does play into how you architect your design so 
>> that
>> it makes best use of the target FPGA structure.  Not doing this may 
>> lead
>> to a design that is far larger and slower than one that is 
>> specifically
>> designed to the architecture.
>
> I thought we were talking about exploration and initial learning, not
> making products.

Well my eventual goal is to implement FPGA in my production systems so 
it probably makes sense to keep that in mind as I begin my first forays. 
My philosophy with the C I've written for the system is to keep it all 
as portable as possible and perhaps have lost efficiency in doing so but 
the products are low-volume and the cost of a bigger/faster part is far 
less than the cost of rewriting platform specific code. I think I will 
carry on that methodology with FPGAs and then look toward performance 
gains with platform specific optimisations if my hands get really tied. 

On Oct 3, 12:10 am, Jarek Rozanski <jarek.rozan...@gmail.com> wrote:
> On 2 Pa , 18:54, Mike Treseler <mike_trese...@comcast.net> wrote:
>
> > Tom Lucas wrote:
> > > Does anybody have any suggestions for a cheap and basic development kit
> > > to practice VHDL on? It doesn't need to do much more than toggle a few
> > > output pins and I'm happy to make up my own programming leads etc. UK
> > > based distributors would be preferred.
>
> > If the objective is to learn vhdl, all you need is
>
> > 1. A simulator to verify and debug
> > the uut and testbench code and
>
> Good solution is a Aldec Active-HDL 7.2 SE (student edition). Very
> good simulation and verification tool. Nice schematic diagrams, easy
> waveform manipulation. Very good choice (personal opinion) for
> learning. Moreover, for this purposes it is free :)

I'll second this recommendation. I've found Active HDL's free student
edition more than enough for educational purposes.

Eli