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On Sat, 21 Jun 2008 18:48:53 -0700, Tim Wescott <t...@seemywebsite.com> wrote: >Joerg wrote: >> Talal Itani wrote: >>> Ok, maybe not tiny. I have never seen this before, so I wonder whey >>> these inductors are there. >>> >> >> Possibly a very young guy did the design. There are people who take a >> sledgehammer to hang a picture. Sometimes the sledgehammer then makes a >> hole in the wall ;-) >> >>> >>>> BTW, 50uH isn't really "tiny". >>> >> >> For RF it's huge. Like a sledgehammer. Sledgehammers can cause a lot of >> grief. >> >WHAT? You mean that semiconductor companies hire kids with no real >experience fresh out of college to be applications engineers? > >Now THAT would imply that they look at their applications engineers as a >marketing expense, not a profit center. Naaaaaah! Can that be ?:-) ...Jim Thompson -- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | | | | America: Land of the Free, Because of the Brave | | | | Due to excessive spam, googlegroups, UAR & AIOE are blocked! |
> > To be honest 50uH and 0.1uF is a recipe for disaster. At the most a > ferrite SMT-bead should be used but usually I don't even do that. A nice > full ground plane and a nice full VCC plane is usually best. Problem with > DSP like this is that you need an additional lower voltage supply so now > you are up to three supply planes, meaning you won't get away with less > than a 6-layer board. > > If it's super critical you could have the analog supplies come from a > separate regulator but often converters on a chip with fast digital > processing going on are quite disappointing. A bond wire affords only so > much in RF conductivity. > > Hint: Carefully read up on power supply sequencing. Best case wriobng > sequencing leads to a locked up DSP, worst case to a dead DSP. > > Oh, and please don't top post. > This DSP has 3.3V and 1.8V supply voltages. Can the same plane have both voltages?
On Sat, 21 Jun 2008 15:25:38 -0700 (PDT), b...@ieee.org wrote: >On Jun 22, 5:52 am, Paul Keinanen <keina...@sci.fi> wrote: >> Are you sure that these are ordinary inductors or just a wire through >> a ferrite bead? >> >> While the ferrite will increase the inductance, a suitable ferrite >> material is also quite lossy at higher frequencies, reducing the risk >> for unwanted resonances with the capacitors. > >Sadly, you can't rely on this. I've had to put little resistors in >series with ferrite bead to kill a resonance - admittedly at a few >hundred kHz, where the bead doesn't look that lossy. It would be quite hard to find material that would be lossy at such low frequencies. For instance materials listed at http://www.fair-rite.com/newfair/materials.htm start at 1 MHz (material 31), while the common material 73 have significant losses only above 10 MHz. Paul
"Talal Itani" <t...@verizon.net> wrote in message news:suk7k.3904$JL.2049@trnddc05... > > >> To be honest 50uH and 0.1uF is a recipe for disaster. At the most a >> ferrite SMT-bead should be used but usually I don't even do that. A nice >> full ground plane and a nice full VCC plane is usually best. Problem with >> DSP like this is that you need an additional lower voltage supply so now >> you are up to three supply planes, meaning you won't get away with less >> than a 6-layer board. >> >> If it's super critical you could have the analog supplies come from a >> separate regulator but often converters on a chip with fast digital >> processing going on are quite disappointing. A bond wire affords only so >> much in RF conductivity. >> >> Hint: Carefully read up on power supply sequencing. Best case wriobng >> sequencing leads to a locked up DSP, worst case to a dead DSP. >> >> Oh, and please don't top post. >> > > This DSP has 3.3V and 1.8V supply voltages. Can the same plane have both > voltages? Talal, You really need some consulting help if you're asking questions like this. The edge rates of your signals are likely to be very fast, and this requires some real know-how when it comes to designing the circuitry, clock distribution and trace lengths, and the general pcb layout. The previous comment regarding supply sequencing should be heeded, too. A short answer for you is this: If you can arrange it, the controlled-impedance traces should couple to (be adjacent to) solid (unsplit) GND plane layers. Then, you can split your supply planes as you need. Otherwise, you have to be very careful in routing your traces so as to avoid coupling gaps which will result in large high-inductance coupling loops, or add extra decoupling to couple these split planes near their splits. You should seek some professional help for your design and/or take a class in high-speed signal integrity. Bob -- == NOTE: I automatically delete all Google Group posts due to uncontrolled SPAM ==
On Sat, 21 Jun 2008 16:06:02 GMT, "Talal Itani" <t...@verizon.net> wrote: >Hello, > >I was looking at the schematics for a DSP-based board, running at 100 MHz. >They have a tiny inductor with every bypass cap around the DSP. Do you >think this is necessary? This DSP has analog stuff built-in. If we do not >need analog, can the inductors be eliminated? > >Thanks, >T.I. Seems a bit overkill. If there is a supply running a PLL circuit in the DSP, you'll need the bead on the PLL supply. Look at the manufacturer's data sheet. Often, they will recommend bypass capacitor issues. --- Mark
On Jun 22, 5:15=A0pm, qrk <SpamT...@spam.net> wrote: > On Sat, 21 Jun 2008 16:06:02 GMT, "Talal Itani" <tit...@verizon.net> > wrote: > > >Hello, > > >I was looking at the schematics for a DSP-based board, running at 100 MH= z. > >They have a tiny inductor with every bypass cap around the DSP. =A0Do yo= u > >think this is necessary? =A0This DSP has analog stuff built-in. =A0If we= do not > >need analog, can the inductors be eliminated? > > >Thanks, > >T.I. > > Seems a bit overkill. If there is a supply running a PLL circuit in > the DSP, you'll need the bead on the PLL supply. Look at the > manufacturer's data sheet. Often, they will recommend bypass capacitor > issues. The Texas Instruments application note for this part doesn't inspire confidence. It might be worth looking at what other - more trustworth - manufacturers recommend for comparable parts. I've had a couple of bad experiences with Texas Instruments and really don't trust their customer support, but even the best of companies - Analog Devices come to mind - aren't infallible. -- Bill Sloman, Nijmegen
Talal Itani wrote: > Hello, > > I was looking at the schematics for a DSP-based board, running at 100 MHz. > They have a tiny inductor with every bypass cap around the DSP. Do you > think this is necessary? This DSP has analog stuff built-in. If we do not > need analog, can the inductors be eliminated? > > Thanks, > T.I. > > Maybe they are showing parasitic inductance of the leads (part plus cap)? Look at the accompanying literature.
"Talal Itani" <t...@verizon.net> wrote in message news:KF97k.84222$G33.55284@trnddc03... > Hello, > > I was looking at the schematics for a DSP-based board, running at 100 MHz. > They have a tiny inductor with every bypass cap around the DSP. Do you > think this is necessary? This DSP has analog stuff built-in. If we do > not need analog, can the inductors be eliminated? > > Thanks, > T.I. > Hello, I designed a board with an 'F2808 about 2 years ago. Based on TI app notes I put 100nH in series with the two ADC power pins only and 2uF to ground on each (2 * 0603 caps - different values). Was it necessary - I don't know - never tried it without. Did the ADC work - yes - I was impressed at how well it worked. The board was 4 layers with careful design of gorund planes/fills around the processor and decoupling caps on both sides. If you email me privately I'll send you a picture of the board from the CAD system. Michael Kellett www.mkesc.co.uk
John Larkin wrote: >Inductors don't generally help digital chips, and may actually reduce >timing margins. We do use ferrite bead+capacitor filters on the supply >rails of some fast opamps and adc's, to keep switcher noise and >other-channel crosstalk from sneaking in. > >The best way to power big digital chips is with solid power planes, >reasonably bypassed. That will present lower rail impedances than you >could get by isolating the bypass caps on a per-pin basis. Unless my design is cost sensitive, I generally put ferrite beads on the wires coming from the power supply. I have never had this actually change how well anything works, but I can see a bit less noise with a scope, and doing it that way is fairly cheap. I have seen all sorts of schemes for power/ground, but I have never seen any thing that beats a solid ground plane and good physical placement of sensitive / noise-producing sections. -- Guy Macon <http://www.GuyMacon.com/>
On Sun, 22 Jun 2008 13:03:09 +0000, Guy Macon <http://www.guymacon.com/> wrote: > > > >John Larkin wrote: > >>Inductors don't generally help digital chips, and may actually reduce >>timing margins. We do use ferrite bead+capacitor filters on the supply >>rails of some fast opamps and adc's, to keep switcher noise and >>other-channel crosstalk from sneaking in. >> >>The best way to power big digital chips is with solid power planes, >>reasonably bypassed. That will present lower rail impedances than you >>could get by isolating the bypass caps on a per-pin basis. > >Unless my design is cost sensitive, I generally put ferrite beads >on the wires coming from the power supply. I have never had this >actually change how well anything works, but I can see a bit less >noise with a scope, and doing it that way is fairly cheap. I have >seen all sorts of schemes for power/ground, but I have never seen >any thing that beats a solid ground plane and good physical placement >of sensitive / noise-producing sections. Any time you add inductance to a supply rail, the consequences should be analyzed. It could... Series resonate at some switching supply frequency and *increase* downstream ripple Add DC drop. With chip core voltages below 1 volt, and timing margins critical, that could get interesting If a chip can grossly shift its average current needs (like a uP, or some analog driver) the added L can make the supply dip. The inductor could fry! I've seen all of these. John