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SuperSpeed Device Design By Example

Hyde, John 2014

This is a "How-To" book which explains, with hands-on examples, how to design and implement a SuperSpeed USB peripheral that can interface to your hardware using a 32-bit 100MHz bus with standard or custom protocols. The book is based on the Cypress FX3 SuperSpeed Device and the firmware examples are written around a low-cost SuperSpeed Explorer board and a companion CPLD board which are available from www.cypress.com/fx3book. The software examples are written for the Windows operating system and the CPLD examples are written in Verilog. The source code for all of the examples is downloadable from the book web site. If you currently think that SuperSpeed USB design is only for the elite then look inside this book and discover that SuperSpeed technology has now been made accessible to the rest of us!


Why Read This Book

You will get a practical, example-driven path to building a USB 3.0 (SuperSpeed) device using the Cypress FX3, including firmware, CPLD/Verilog interfaces, and host-side code. The book demystifies high-speed USB design with downloadable source and a low-cost companion board so you can prototype and validate real hardware quickly.

Who Will Benefit

Embedded hardware and firmware engineers (mid-level) who need to design or prototype SuperSpeed USB peripherals and integrate them with custom bus logic or CPLDs/FPGA.

Level: Intermediate — Prerequisites: Familiarity with embedded C programming, basic digital logic/Verilog, and fundamental USB concepts (endpoints, descriptors, enumeration); experience with Windows development tools is helpful.

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Key Takeaways

  • Implement a SuperSpeed USB device using the Cypress EZ-USB FX3 and its GPIF II interface.
  • Design CPLD/FPGA glue logic in Verilog to bridge a 32-bit 100MHz bus to the FX3 streaming interface.
  • Develop FX3 firmware (C) and use the FX3 SDK to manage USB endpoints, DMA, and control transfers.
  • Create and test Windows host applications/drivers to communicate with your USB device and validate throughput.
  • Diagnose and optimize USB 3.0 performance and throughput issues on real hardware.
  • Package and structure real-world example designs with downloadable source to accelerate prototyping.

Topics Covered

  1. Introduction to SuperSpeed USB and design goals
  2. Overview of the Cypress EZ-USB FX3 architecture
  3. Hardware platform: SuperSpeed Explorer board and CPLD companion
  4. GPIF II interface and bus protocol design (32-bit 100MHz)
  5. CPLD/FPGA implementation examples in Verilog
  6. FX3 firmware architecture and SDK usage
  7. Endpoint configuration, descriptors, and control transfers
  8. DMA streaming, buffering, and throughput optimization
  9. Windows host-side examples and test applications
  10. Debugging, testing, and USB analyzer usage
  11. Power, compliance, and practical hardware considerations
  12. Project source code, build instructions, and appendices

Languages, Platforms & Tools

CC++ (host examples)VerilogCypress EZ-USB FX3SuperSpeed Explorer board (FX3)Generic CPLD/FPGA (board examples)Cypress FX3 SDK (EZ-USB SDK)Visual Studio (Windows host builds)Verilog toolchains / vendor tools (e.g., Xilinx/Altera/Intel/CPLD tools)USB protocol analyzers (e.g., Total Phase, Ellisys) — recommended

How It Compares

More focused and hands-on for USB3 device builders than Jan Axelson's 'USB Complete' (which is broader and USB-agnostic); has fewer protocol-theory details but far more FX3-specific, practical examples than general USB texts.

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