Arm Architecture Reference Manual
An authoritative, insider's guide to the world's most widely-used 32-bit RISC microprocessor architecture.
-- Presents both an architecture overview and a programmer's model.
-- Introduces the ARM instruction set and code sequences.
-- ARM RISC chips power 90% of the world's mobile phones -- and are expected to be at the heart of many low-cost network computer solutions.
This is the only complete guide to ARM, the world's most widely-available 32-bit RISC microprocessor architecture.
Produced by the architects that are actively working on the ARM specification, this book contains detailed information about all versions of the ARM and ThumbTM instruction sets, the memory management and cache functions, and optimized code examples. Both an architectural overview and programmer's model are presented. Coverage also includes 26-bit architectures and the System Control Coprocessor.
Why Read This Book
You will get the authoritative, low-level view of the classic 32-bit ARM architecture straight from the architects who defined it, so you can reason about code generation, system design, and firmware with confidence. This manual gives you definitive details on ARM and Thumb instruction semantics, programmer's model, MMU and cache behavior, and practical guidance for writing and optimizing low-level code.
Who Will Benefit
Firmware engineers, OS porters, compiler writers, and embedded systems architects with an intermediate-to-advanced background who need definitive ARM ISA and system-level details for low-level coding, optimization, or system integration.
Level: Advanced — Prerequisites: Familiarity with digital logic and microprocessor fundamentals, experience with C and assembly language, and a working understanding of computer architecture concepts (pipelines, caches, virtual memory).
Key Takeaways
- Describe the ARM programmer's model, core registers, modes, and exception model.
- Write and optimize ARM and Thumb assembly sequences for performance and code density.
- Design and configure memory management structures including the MMU, page tables, and virtual memory mappings.
- Explain cache architecture, TLB behavior and coherency issues and apply techniques to manage them.
- Implement low-level exception/interrupt handling, reset/boot sequences, and firmware entry points.
- Interpret instruction encodings and use the reference to support toolchains, debuggers and binary analysis.
Topics Covered
- Introduction and history of the ARM architecture
- Architectural overview and design principles
- Programmer's model: registers, modes, and state
- ARM instruction set (ARM state) — operations and semantics
- Thumb instruction set and ARM/Thumb interworking
- Instruction encoding, opcode tables and binary formats
- Pipelining, hazards, and performance considerations
- Exception handling, interrupts and supervisor modes
- Memory system: caches, TLBs and coherency
- Memory Management Unit (MMU) and virtual memory
- Coprocessors and system control registers
- Debugging, profiling and toolchain integration
- System integration: reset, boot sequence and low-level firmware
- Appendices: reference tables, encodings, and programmer's model summary
Languages, Platforms & Tools
How It Compares
More formal and specification-focused than the tutorial-style ARM System Developer's Guide (Sloss et al.); for more recent core families, pair it with vendor-specific Cortex technical reference manuals for implementation details.
